A 0.82mW 14b 130MS/S Pipelined-SAR ADC With a Distributed Averaging Correlated Level Shifting (DACLS) Ringamp and Bypass-Window Backend

Jia Ching Wang, Tai Haur Kuo

研究成果: 書貢獻/報告類型會議論文篇章同行評審

1 引文 斯高帕斯(Scopus)

摘要

To fulfill upcoming communication specifications, it has become popular recently to employ pipelined-SAR architectures, incorporating residue amplifiers (RA) to achieve high resolution, wide bandwidth, and low-power ADCs [1, 2]. Hence, the RA design plays an important role in the ADCs. In this work, a distributed averaging correlated level shifting (DACLS) ringamp is proposed to not only enhance the resolution by reducing the RA gain error, but also extend the bandwidth by minimizing the RA output load compared to prior arts [2 - 4]. In addition, a customized bypass-window backend for the last pipeline stage is applied for power reduction.

原文???core.languages.en_GB???
主出版物標題2022 IEEE International Solid-State Circuits Conference, ISSCC 2022
發行者Institute of Electrical and Electronics Engineers Inc.
頁面162-164
頁數3
ISBN(電子)9781665428002
DOIs
出版狀態已出版 - 2022
事件2022 IEEE International Solid-State Circuits Conference, ISSCC 2022 - San Francisco, United States
持續時間: 20 2月 202226 2月 2022

出版系列

名字Digest of Technical Papers - IEEE International Solid-State Circuits Conference
2022-February
ISSN(列印)0193-6530

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???event.eventtypes.event.conference???2022 IEEE International Solid-State Circuits Conference, ISSCC 2022
國家/地區United States
城市San Francisco
期間20/02/2226/02/22

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