摘要
A fully differential low-voltage low-power downconversion mixer using a TSMC 0.18-μm CMOS logic process is presented in this letter. The mixer was designed with a four-terminal MOS transistor, the radio-frequency (RF) and local-oscillator signals apply to the gate and bulk of the device, respectively while the intermediate frequency (IF) signals output was from the drain. The mixer features a maximum conversion gain of 5.7 dB at 2.4 GHz, an ultra low dc power consumption of 0.48 mW, a noise figure of 15 dB, and an input IP 3 of -5.7 dBm. Moreover, the chip area of the mixer core is only 0.18 × 0.2 mm 2. The measured 3-dB RF frequency bandwidth is from 0.5 to 7.5 GHz with an IF of 100 MHz, and it is greatly suitable for low-power in wireless communication.
原文 | ???core.languages.en_GB??? |
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文章編號 | 4266844 |
頁(從 - 到) | 531-533 |
頁數 | 3 |
期刊 | IEEE Microwave and Wireless Components Letters |
卷 | 17 |
發行號 | 7 |
DOIs | |
出版狀態 | 已出版 - 7月 2007 |