2.1 dB noise figure 5.2 GHz CMOS low noise amplifier using wafer-level integrated passive device technology with a DC power consumption of 10 mW

K. C. Lin, H. K. Chiou, D. C. Chang, Y. Z. Juang

研究成果: 雜誌貢獻 › 期刊論文 › 同行評審

2 引文 斯高帕斯（Scopus）

指紋

深入研究「2.1 dB noise figure 5.2 GHz CMOS low noise amplifier using wafer-level integrated passive device technology with a DC power consumption of 10 mW」主題。共同形成了獨特的指紋。

Engineering & Materials Science