10Gbps decision feedback equalizer with dynamic lookahead decision loop

Yu Chun Lin, Muh Tian Shiue, Shyh Jye Jou

研究成果: 書貢獻/報告類型會議論文篇章同行評審

12 引文 斯高帕斯(Scopus)

摘要

Decision feedback equalizer (DFE) uses a feedback path to cancel post-cursor ISI, and this feedback path will also cause the limitation of its maximum throughput rate. This paper proposes a new lookahead method to break the feedback path for multi-gigabit DFE design. After lookahead computation, each paralleled sub-circuit has the same throughput rate as original one. Therefore, the total throughput rate is proportional to the parallelization factor. The computation complexity of the proposed architecture is lower than that of multiplexer-based lookahead DFE if the tap number of the feedback filter is large. It is shown that the new method saves 10% hardware complexity for an 8 taps feedback filter DFE and 98% hardware complexity for a 12 taps feedback filter DFE in comparison to a 10Gbps multiplexer-based lookahead DFE.

原文???core.languages.en_GB???
主出版物標題2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
頁面1839-1842
頁數4
DOIs
出版狀態已出版 - 2009
事件2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan
持續時間: 24 5月 200927 5月 2009

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(列印)0271-4310

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???event.eventtypes.event.conference???2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
國家/地區Taiwan
城市Taipei
期間24/05/0927/05/09

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