每年專案
個人檔案
研究領域
電子設計自動化、晶片老化緩解與可靠晶片設計、低功耗晶片設計最佳化、記憶體內運算(IMC)
晶片配電網(PDN)設計與優化、AI於EDA之應用
指紋
查看啟用 Yu-Guang Chen 的研究主題。這些主題標籤來自此人的作品。共同形成了獨特的指紋。
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國家/地區層面的近期外部共同作業。按一下圓點深入探索詳細資料，或
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A Novel DNN Accelerator for Light-weight Neural Networks: Concept and Design
Chen, Y-G., Hsieh, T. H., Ho, Y. C. & Jou, J. Y., 2022, Proceeding - IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022. Institute of Electrical and Electronics Engineers Inc., p. 250-253 4 p. (Proceeding - IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2022).研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審
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Overview of 2022 CAD contest at ICCAD
Chen, Y. G., Wang, C. Y., Huang, T. W. & Sato, T., 30 10月 2022, Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022. Institute of Electrical and Electronics Engineers Inc., 92. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審
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A Hierarchical and Reconfigurable Process Element Design for Quantized Neural Networks
Chen, Y. G., Hsu, C. W., Chiang, H. Y., Hsieh, T. H. & Jou, J. Y., 2021, Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021. Qu, G., Xiong, J., Zhao, D., Muthukumar, V., Reza, M. F. & Sridhar, R. (編輯). IEEE Computer Society, p. 278-283 6 p. (International System on Chip Conference; 卷 2021-September).研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審
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An Aging-Aware CMOS SRAM Structure Design for Boolean Logic In-Memory Computing
Chang, W., Chen, Y. G., Huang, P. Y. & Li, J. F., 2021, 34th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021. Dilillo, L., Cassano, L. & Papadimitriou, A. (編輯). Institute of Electrical and Electronics Engineers Inc., (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT; 卷 2021-October).研究成果: 書貢獻/報告類型 › 會議論文篇章 › 同行評審
1 引文 斯高帕斯（Scopus） -
An efficient NBTI-aware wake-up strategy: Concept, design, and manipulation
Chen, Y. G., Lin, I. C., Chiu, K. W. & Liu, C. H., 9月 2021, 於: Integration, the VLSI Journal. 80, p. 60-71 12 p.研究成果: 雜誌貢獻 › 期刊論文 › 同行評審
2 引文 斯高帕斯（Scopus）