XB+-Tree: Access-Pattern-Aware Cache-Line-Based Tree for Non-volatile Main Memory Architecture

Li Zheng Liang, Ming Chang Yang, Yuan Hao Chang, Tseng Yi Chen, Shuo Han Chen, Hsin Wen Wei, Wei Kuan Shih

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Non-volatile memory (NVM) has widely participated in the evolution of the next-generation memory architecture by way of being the substitution of the main memory. To cope with the problem of asymmetric read/write speeds of NVM, several excellent researches have been proposed to reduce the number of writes to the NVM-based main memory. Nevertheless, most of these existing approaches do not take the cache-line-based access behavior between the processor and the main memory into consideration. Thus, in order to essentially improve the access performance of the NVM-based memory architecture, this work aims to optimize the cache-line-based access performance over the NVM-based memory architecture based on the special access patterns in many popular internet of things (IoT) and in-memory database applications. Our experiments based on the well-known Gem5 full system simulator reveal that, compared to other existing representative approaches, the proposed design can effectively reduce the total execution time of insertion by 20.92~55.20% and improve the execution time of query by 2.06~23.36%.

Original languageEnglish
Title of host publicationProceedings - 2017 IEEE 41st Annual Computer Software and Applications Conference, COMPSAC 2017
EditorsClaudio Demartini, Thomas Conte, Motonori Nakamura, Chung-Horng Lung, Zhiyong Zhang, Kamrul Hasan, Sorel Reisman, Ling Liu, William Claycomb, Hiroki Takakura, Ji-Jiang Yang, Edmundo Tovar, Stelvio Cimato, Sheikh Iqbal Ahamed, Toyokazu Akiyama
PublisherIEEE Computer Society
Pages483-491
Number of pages9
ISBN (Electronic)9781538603673
DOIs
StatePublished - 7 Sep 2017
Event41st IEEE Annual Computer Software and Applications Conference, COMPSAC 2017 - Torino, Italy
Duration: 4 Jul 20178 Jul 2017

Publication series

NameProceedings - International Computer Software and Applications Conference
Volume1
ISSN (Print)0730-3157

Conference

Conference41st IEEE Annual Computer Software and Applications Conference, COMPSAC 2017
Country/TerritoryItaly
CityTorino
Period4/07/178/07/17

Keywords

  • access-pattern-aware
  • cache-line-based tree
  • in-memory database
  • Non-Volatile main memory
  • NVM

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