VLSI implementation of visual block pattern truncation coding

Yuan Chen Liu, Yeong Kang Lai, Tsung Han Tsai, Po Cheng Wu, Liang Gee Chen

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

The paper proposes a pipelined architecture of visual block pattern truncation coding algorithm to minimize mean square error. Using this chip, the VBPTC based system can be applied to real-time encoding for the moving pictures.

Original languageEnglish
Pages (from-to)490-499
Number of pages10
JournalIEEE Transactions on Consumer Electronics
Volume44
Issue number3
DOIs
StatePublished - 1998

Keywords

  • Block truncation coding
  • VLSI implementation
  • Visual block pattern truncation coding
  • Visual pattern image coding

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