VLSI design for SC-based speaker recognition

Chien Yao Wang; Min Shih; Tzu Chiang Tai; Po Chuan Lin; Shih Ting Huang; Jia Hao Zhao; Jia Ching Wang

doi:10.1109/ICIEA.2015.7334135

VLSI design for SC-based speaker recognition

Chien Yao Wang, Min Shih, Tzu Chiang Tai, Po Chuan Lin, Shih Ting Huang, Jia Hao Zhao, Jia Ching Wang

Department of Computer Science and Information Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

This work presents an efficient VLSI architecture design for sparse coding (SC)-based speaker recognition system. The proposed system first extracts the linear predictive cepstral coefficients (LPCCs). Then, we applied orthogonal matching pursuit (OMP) for sparse coding and using the sparse coefficients as feature to do classification task. To speed up the computation time, our proposed chip comprises a LPCC module and an OMP module. The LPCC module computes the linear predictive coefficients (LPCs) and then converts LPCs to LPCCs. The OMP module includes residual unit, atom selection unit, QR decomposition unit, triangular matrix inverse unit and matrix multiplication unit. This designed chip has ability to handle a large dictionary size for sparse coding in OMP modules. The prototype chip is implemented using TSMC 90 nm CMOS technology on a die with a size of approximately 1.9×1.9 mm².

Original language	English
Title of host publication	Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	335-338
Number of pages	4
ISBN (Electronic)	9781467373173
DOIs	https://doi.org/10.1109/ICIEA.2015.7334135
State	Published - 20 Nov 2015
Event	10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015 - Auckland, New Zealand Duration: 15 Jun 2015 → 17 Jun 2015

Publication series

Name	Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015

Conference

Conference	10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015
Country/Territory	New Zealand
City	Auckland
Period	15/06/15 → 17/06/15

Keywords

sparse coding
Speaker recognition
VLSI

Access to Document

10.1109/ICIEA.2015.7334135

Cite this

Wang, C. Y., Shih, M., Tai, T. C., Lin, P. C., Huang, S. T., Zhao, J. H., & Wang, J. C. (2015). VLSI design for SC-based speaker recognition. In Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015 (pp. 335-338). [7334135] (Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICIEA.2015.7334135

Wang, Chien Yao ; Shih, Min ; Tai, Tzu Chiang et al. / VLSI design for SC-based speaker recognition. Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 335-338 (Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015).

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abstract = "This work presents an efficient VLSI architecture design for sparse coding (SC)-based speaker recognition system. The proposed system first extracts the linear predictive cepstral coefficients (LPCCs). Then, we applied orthogonal matching pursuit (OMP) for sparse coding and using the sparse coefficients as feature to do classification task. To speed up the computation time, our proposed chip comprises a LPCC module and an OMP module. The LPCC module computes the linear predictive coefficients (LPCs) and then converts LPCs to LPCCs. The OMP module includes residual unit, atom selection unit, QR decomposition unit, triangular matrix inverse unit and matrix multiplication unit. This designed chip has ability to handle a large dictionary size for sparse coding in OMP modules. The prototype chip is implemented using TSMC 90 nm CMOS technology on a die with a size of approximately 1.9×1.9 mm2.",

keywords = "sparse coding, Speaker recognition, VLSI",

author = "Wang, {Chien Yao} and Min Shih and Tai, {Tzu Chiang} and Lin, {Po Chuan} and Huang, {Shih Ting} and Zhao, {Jia Hao} and Wang, {Jia Ching}",

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Wang, CY, Shih, M, Tai, TC, Lin, PC, Huang, ST, Zhao, JH & Wang, JC 2015, VLSI design for SC-based speaker recognition. in Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015., 7334135, Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015, Institute of Electrical and Electronics Engineers Inc., pp. 335-338, 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015, Auckland, New Zealand, 15/06/15. https://doi.org/10.1109/ICIEA.2015.7334135

VLSI design for SC-based speaker recognition. / Wang, Chien Yao; Shih, Min; Tai, Tzu Chiang et al.
Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 335-338 7334135 (Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Shih, Min

AU - Tai, Tzu Chiang

AU - Lin, Po Chuan

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AU - Zhao, Jia Hao

AU - Wang, Jia Ching

PY - 2015/11/20

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N2 - This work presents an efficient VLSI architecture design for sparse coding (SC)-based speaker recognition system. The proposed system first extracts the linear predictive cepstral coefficients (LPCCs). Then, we applied orthogonal matching pursuit (OMP) for sparse coding and using the sparse coefficients as feature to do classification task. To speed up the computation time, our proposed chip comprises a LPCC module and an OMP module. The LPCC module computes the linear predictive coefficients (LPCs) and then converts LPCs to LPCCs. The OMP module includes residual unit, atom selection unit, QR decomposition unit, triangular matrix inverse unit and matrix multiplication unit. This designed chip has ability to handle a large dictionary size for sparse coding in OMP modules. The prototype chip is implemented using TSMC 90 nm CMOS technology on a die with a size of approximately 1.9×1.9 mm2.

AB - This work presents an efficient VLSI architecture design for sparse coding (SC)-based speaker recognition system. The proposed system first extracts the linear predictive cepstral coefficients (LPCCs). Then, we applied orthogonal matching pursuit (OMP) for sparse coding and using the sparse coefficients as feature to do classification task. To speed up the computation time, our proposed chip comprises a LPCC module and an OMP module. The LPCC module computes the linear predictive coefficients (LPCs) and then converts LPCs to LPCCs. The OMP module includes residual unit, atom selection unit, QR decomposition unit, triangular matrix inverse unit and matrix multiplication unit. This designed chip has ability to handle a large dictionary size for sparse coding in OMP modules. The prototype chip is implemented using TSMC 90 nm CMOS technology on a die with a size of approximately 1.9×1.9 mm2.

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Wang CY, Shih M, Tai TC, Lin PC, Huang ST, Zhao JH et al. VLSI design for SC-based speaker recognition. In Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 335-338. 7334135. (Proceedings of the 2015 10th IEEE Conference on Industrial Electronics and Applications, ICIEA 2015). doi: 10.1109/ICIEA.2015.7334135

VLSI design for SC-based speaker recognition

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