Verification tool for systolic array design

Fuyau Lin; Timothy Shih; Nam Ling

Verification tool for systolic array design

Fuyau Lin, Timothy Shih, Nam Ling

Department of Computer Science and Information Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

The axiomatization of STA (systolic temporal arithmetic) defines rules for the systolic array in the language of the predicate calculus. The STA formalism is briefly reviewed and an automated verifier is constructed using Prolog. The verification tool is developed to produce a sound and efficient verification process and provide short-cuts to justify systolic array designs. The STA specifications and the corresponding Prolog programs can be written using an almost identical notation.

Original language	English
Title of host publication	Third Int Conf Tools Artif Intell
Publisher	Publ by IEEE
Pages	488-492
Number of pages	5
ISBN (Print)	0818623004
State	Published - 1992
Event	Third International Conference on Tools for Artificial Intelligence - San Jose, CA, USA Duration: 5 Nov 1991 → 8 Nov 1991

Publication series

Name	Third Int Conf Tools Artif Intell

Conference

Conference	Third International Conference on Tools for Artificial Intelligence
City	San Jose, CA, USA
Period	5/11/91 → 8/11/91

Cite this

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title = "Verification tool for systolic array design",

abstract = "The axiomatization of STA (systolic temporal arithmetic) defines rules for the systolic array in the language of the predicate calculus. The STA formalism is briefly reviewed and an automated verifier is constructed using Prolog. The verification tool is developed to produce a sound and efficient verification process and provide short-cuts to justify systolic array designs. The STA specifications and the corresponding Prolog programs can be written using an almost identical notation.",

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year = "1992",

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T1 - Verification tool for systolic array design

AU - Lin, Fuyau

AU - Shih, Timothy

AU - Ling, Nam

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N2 - The axiomatization of STA (systolic temporal arithmetic) defines rules for the systolic array in the language of the predicate calculus. The STA formalism is briefly reviewed and an automated verifier is constructed using Prolog. The verification tool is developed to produce a sound and efficient verification process and provide short-cuts to justify systolic array designs. The STA specifications and the corresponding Prolog programs can be written using an almost identical notation.

AB - The axiomatization of STA (systolic temporal arithmetic) defines rules for the systolic array in the language of the predicate calculus. The STA formalism is briefly reviewed and an automated verifier is constructed using Prolog. The verification tool is developed to produce a sound and efficient verification process and provide short-cuts to justify systolic array designs. The STA specifications and the corresponding Prolog programs can be written using an almost identical notation.

UR - http://www.scopus.com/inward/record.url?scp=0026727371&partnerID=8YFLogxK

M3 - 會議論文篇章

AN - SCOPUS:0026727371

SN - 0818623004

T3 - Third Int Conf Tools Artif Intell

SP - 488

EP - 492

BT - Third Int Conf Tools Artif Intell

PB - Publ by IEEE

T2 - Third International Conference on Tools for Artificial Intelligence

Y2 - 5 November 1991 through 8 November 1991

ER -

Verification tool for systolic array design

Abstract

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