Verification of pin-accurate port connections

Geeng Wei Lee, Juinn Dar Huang, Chun Yao Wang, Jing Yang Jou

Research output: Contribution to journalArticlepeer-review

1 Scopus citations


Before verifying the functionality of SoCs, designers must ensure the correctness of the pin-accurate interfaces of up to hundreds of integrated IP blocks. This article presents a new connection model and a corresponding error model for pin-accurate port connections, along with an algorithm for generating the minimum pattern set, a methodology for diagnosing errors, and a port connection verification flow.

Original languageEnglish
Pages (from-to)478-494
Number of pages17
JournalIEEE Design and Test of Computers
Issue number5
StatePublished - 2008


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