The understanding of the trap induced variation in bulk tri-gate devices by a novel Random Trap Profiling (RTP) technique

H. M. Tsai; E. R. Hsieh; Steve S. Chung; C. H. Tsai; R. M. Huang; C. T. Tsai; C. W. Liang

doi:10.1109/VLSIT.2012.6242525

The understanding of the trap induced variation in bulk tri-gate devices by a novel Random Trap Profiling (RTP) technique

H. M. Tsai, E. R. Hsieh, Steve S. Chung, C. H. Tsai, R. M. Huang, C. T. Tsai, C. W. Liang

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

13 Scopus citations

Abstract

Not only the popular random dopant fluctuation (RDF), but also the traps, caused by the HC stress or NBTI-stress, induce the V _th variations. To identify these traps, for the first time, a unique random trap profiling feasible for 3D device applications has been demonstrated on trigate devices. For such devices, the oxide traps are generated not only near the drain side but also on the sidewall, after hot carrier (HC) and NBTI stresses. More importantly, the Vth variation in pMOSFET under NBTI becomes much worse as a result of an additional surface roughness effect. This method provides us a valuable tool for the diagnosis of reliability in 3D devices (e.g., FinFET).

Original language	English
Title of host publication	2012 Symposium on VLSI Technology, VLSIT 2012 - Digest of Technical Papers
Pages	189-190
Number of pages	2
DOIs	https://doi.org/10.1109/VLSIT.2012.6242525
State	Published - 2012
Event	2012 Symposium on VLSI Technology, VLSIT 2012 - Honolulu, HI, United States Duration: 12 Jun 2012 → 14 Jun 2012

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)	0743-1562

Conference

Conference	2012 Symposium on VLSI Technology, VLSIT 2012
Country/Territory	United States
City	Honolulu, HI
Period	12/06/12 → 14/06/12

Access to Document

10.1109/VLSIT.2012.6242525

Cite this

Tsai, H. M., Hsieh, E. R., Chung, S. S., Tsai, C. H., Huang, R. M., Tsai, C. T., & Liang, C. W. (2012). The understanding of the trap induced variation in bulk tri-gate devices by a novel Random Trap Profiling (RTP) technique. In 2012 Symposium on VLSI Technology, VLSIT 2012 - Digest of Technical Papers (pp. 189-190). [6242525] (Digest of Technical Papers - Symposium on VLSI Technology). https://doi.org/10.1109/VLSIT.2012.6242525

@inproceedings{b2a36776f64048cca7af8c4ed97f98a5,

title = "The understanding of the trap induced variation in bulk tri-gate devices by a novel Random Trap Profiling (RTP) technique",

abstract = "Not only the popular random dopant fluctuation (RDF), but also the traps, caused by the HC stress or NBTI-stress, induce the V th variations. To identify these traps, for the first time, a unique random trap profiling feasible for 3D device applications has been demonstrated on trigate devices. For such devices, the oxide traps are generated not only near the drain side but also on the sidewall, after hot carrier (HC) and NBTI stresses. More importantly, the Vth variation in pMOSFET under NBTI becomes much worse as a result of an additional surface roughness effect. This method provides us a valuable tool for the diagnosis of reliability in 3D devices (e.g., FinFET).",

author = "Tsai, {H. M.} and Hsieh, {E. R.} and Chung, {Steve S.} and Tsai, {C. H.} and Huang, {R. M.} and Tsai, {C. T.} and Liang, {C. W.}",

year = "2012",

doi = "10.1109/VLSIT.2012.6242525",

language = "???core.languages.en_GB???",

isbn = "9781467308458",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

pages = "189--190",

booktitle = "2012 Symposium on VLSI Technology, VLSIT 2012 - Digest of Technical Papers",

note = "2012 Symposium on VLSI Technology, VLSIT 2012 ; Conference date: 12-06-2012 Through 14-06-2012",

}

Tsai, HM, Hsieh, ER, Chung, SS, Tsai, CH, Huang, RM, Tsai, CT & Liang, CW 2012, The understanding of the trap induced variation in bulk tri-gate devices by a novel Random Trap Profiling (RTP) technique. in 2012 Symposium on VLSI Technology, VLSIT 2012 - Digest of Technical Papers., 6242525, Digest of Technical Papers - Symposium on VLSI Technology, pp. 189-190, 2012 Symposium on VLSI Technology, VLSIT 2012, Honolulu, HI, United States, 12/06/12. https://doi.org/10.1109/VLSIT.2012.6242525

The understanding of the trap induced variation in bulk tri-gate devices by a novel Random Trap Profiling (RTP) technique. / Tsai, H. M.; Hsieh, E. R.; Chung, Steve S. et al.
2012 Symposium on VLSI Technology, VLSIT 2012 - Digest of Technical Papers. 2012. p. 189-190 6242525 (Digest of Technical Papers - Symposium on VLSI Technology).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - The understanding of the trap induced variation in bulk tri-gate devices by a novel Random Trap Profiling (RTP) technique

AU - Tsai, H. M.

AU - Hsieh, E. R.

AU - Chung, Steve S.

AU - Tsai, C. H.

AU - Huang, R. M.

AU - Tsai, C. T.

AU - Liang, C. W.

PY - 2012

Y1 - 2012

N2 - Not only the popular random dopant fluctuation (RDF), but also the traps, caused by the HC stress or NBTI-stress, induce the V th variations. To identify these traps, for the first time, a unique random trap profiling feasible for 3D device applications has been demonstrated on trigate devices. For such devices, the oxide traps are generated not only near the drain side but also on the sidewall, after hot carrier (HC) and NBTI stresses. More importantly, the Vth variation in pMOSFET under NBTI becomes much worse as a result of an additional surface roughness effect. This method provides us a valuable tool for the diagnosis of reliability in 3D devices (e.g., FinFET).

AB - Not only the popular random dopant fluctuation (RDF), but also the traps, caused by the HC stress or NBTI-stress, induce the V th variations. To identify these traps, for the first time, a unique random trap profiling feasible for 3D device applications has been demonstrated on trigate devices. For such devices, the oxide traps are generated not only near the drain side but also on the sidewall, after hot carrier (HC) and NBTI stresses. More importantly, the Vth variation in pMOSFET under NBTI becomes much worse as a result of an additional surface roughness effect. This method provides us a valuable tool for the diagnosis of reliability in 3D devices (e.g., FinFET).

UR - http://www.scopus.com/inward/record.url?scp=84866551571&partnerID=8YFLogxK

U2 - 10.1109/VLSIT.2012.6242525

DO - 10.1109/VLSIT.2012.6242525

M3 - 會議論文篇章

AN - SCOPUS:84866551571

SN - 9781467308458

T3 - Digest of Technical Papers - Symposium on VLSI Technology

SP - 189

EP - 190

BT - 2012 Symposium on VLSI Technology, VLSIT 2012 - Digest of Technical Papers

T2 - 2012 Symposium on VLSI Technology, VLSIT 2012

Y2 - 12 June 2012 through 14 June 2012

ER -

Tsai HM, Hsieh ER, Chung SS, Tsai CH, Huang RM, Tsai CT et al. The understanding of the trap induced variation in bulk tri-gate devices by a novel Random Trap Profiling (RTP) technique. In 2012 Symposium on VLSI Technology, VLSIT 2012 - Digest of Technical Papers. 2012. p. 189-190. 6242525. (Digest of Technical Papers - Symposium on VLSI Technology). doi: 10.1109/VLSIT.2012.6242525

The understanding of the trap induced variation in bulk tri-gate devices by a novel Random Trap Profiling (RTP) technique

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