The understanding of the bulk trigate MOSFET's reliability through the manipulation of RTN traps

E. R. Hsieh, P. C. Wu, Steve S. Chung, C. H. Tsai, R. M. Huang, C. T. Tsai

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The manipulation of RTN-trap profiling bas been experimentally demonstrated on both planar and trigate MOSFETs. It was achieved by a simple experimental method to take the 2D profiling of the RTN-trap in both oxide depth (vertical) and channel (lateral) directions in the gate oxide. Then, by arranging various 2D fields for the device stress condition, the positions of RTN traps can be precisely controlled. This is the first being reported that the positions of RTN-traps can be manipulated, showing significant advances for the understanding of the trap generation and the impact on the device reliability. Results have demonstrated why trigate exhibits much worse reliability than the planar ones.

Original languageEnglish
Title of host publication2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013
DOIs
StatePublished - 2013
Event2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013 - Hsinchu, Taiwan
Duration: 22 Apr 201324 Apr 2013

Publication series

Name2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013

Conference

Conference2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013
Country/TerritoryTaiwan
CityHsinchu
Period22/04/1324/04/13

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