The understanding of multi-level RTN in trigate MOSFETs through the 2D profiling of traps and its impact on SRAM performance: A new failure mechanism found

E. R. Hsieh, Y. L. Tsai, Steve S. Chung, C. H. Tsai, R. M. Huang, C. T. Tsai

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

13 Scopus citations

Abstract

The impact of multi-level RTN on SRAM cells bas been experimentally demonstrated on both planar and trigate CMOS devices. First, to study multi-level RTN, a simple experimental method has been developed to take the 2D profiling of multi-traps in both oxide depth (vertical) and channel(lateral) directions in the gate oxide. Then, the role of traps in the switching mechanisms of SRAM cells has also been examined. Results show that the multi-traps will degrade RSNM (read static noise margin), as well as cause transition failure in SRAM operations. This is the first being observed and reported that will be considered as a major criterion in the future low voltage design of SRAM cells.

Original languageEnglish
Title of host publication2012 IEEE International Electron Devices Meeting, IEDM 2012
Pages19.2.1-19.2.4
DOIs
StatePublished - 2012
Event2012 IEEE International Electron Devices Meeting, IEDM 2012 - San Francisco, CA, United States
Duration: 10 Dec 201213 Dec 2012

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Conference

Conference2012 IEEE International Electron Devices Meeting, IEDM 2012
Country/TerritoryUnited States
CitySan Francisco, CA
Period10/12/1213/12/12

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