The RTN measurement technique on leakage path finding in advanced high-k metal gate CMOS devices

E. R. Hsieh, P. Y. Lu, Steve S. Chung, J. C. Ke, C. W. Yang, C. T. Tsai, T. R. Yew

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

In this paper, the evolution of BTI induced leakage paths has been evaluated by Ig-RTN technique and demonstrated on HK/MG CMOS devices. First, RTN measurement has been elaborated to identify the location of traps and their correlation to the leakage current. Then, the measured gate current transient can be used to analyze the formation of breakdown path. The results show that the evolution of leakage paths can be divided into three stages, i.e., (1) the early stage-only gate leakage and discrete RTN traps are observed, (2) the middle stage - the traps interacting with the percolation paths and exhibits a multi-level current-variation, and (3) the last stage - the formation of breakdown path. These findings provide useful information on the understanding of gate dielectric breakdown in high-k CMOS devices.

Original languageEnglish
Title of host publicationProceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages154-157
Number of pages4
ISBN (Electronic)9781479999286, 9781479999286
DOIs
StatePublished - 25 Aug 2015
Event22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015 - Hsinchu, Taiwan
Duration: 29 Jun 20152 Jul 2015

Publication series

NameProceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA
Volume2015-August

Conference

Conference22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015
Country/TerritoryTaiwan
CityHsinchu
Period29/06/152/07/15

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