The design and simulations of phase and timing tracking circuits with pre-assured 2^nd order digital loop filter

Phase and timing tracking circuits are always a crucial issue in circuit designs, especially in mobile communications and many other applications which will produce phase shift or timing jitter due to relative activity or environments variations. For keeping track of these crucial changing parameters, a synchronization circuit with 2^nd order digital loop is generally applied for its simplicity, flexibility, and fast setting time. In this paper, a typical 2^nd order digital loop filter with pre-assured stable convergence triangle from Jury criteria is developed, which can then be directly applied in many circuit designs with phase or timing jitter by simply adjusting two digital loop parameters. The convergence property and the effectiveness of this digital loop filter and its applied circuits with derived recursive formulations are well studied and simulated. This simple and direct scheme can easily tell the designers the stable convergence contours under specific circumstances in the whole design stages.