The behavior of off-state stress-induced electrons trapped at the buffer layer in AlGaN/GaN heterostructure field effect transistors

W. C. Liao; Y. L. Chen; C. H. Chen; J. I. Chyi; Y. M. Hsin

doi:10.1063/1.4862669

The behavior of off-state stress-induced electrons trapped at the buffer layer in AlGaN/GaN heterostructure field effect transistors

W. C. Liao, Y. L. Chen, C. H. Chen, J. I. Chyi, Y. M. Hsin

Research output: Contribution to journal › Article › peer-review

17 Scopus citations

Abstract

A measurement methodology involving the synchronous switching of gate to source voltage and drain to source voltage (V_DS) was proposed for determining the shift of threshold voltage after an AlGaN/GaN heterostructure transistor endures high V_DS off-state stress. The measurement results indicated slow electron detrapping behavior. The trap level was determined as (E_C - 0.6 eV). Simulation tool was used to analyze the measurement results. The simulation results were consistent with the experimental results; and a relationship between the buffer trap and threshold voltage shift over time was observed.

Original language	English
Article number	033503
Journal	Applied Physics Letters
Volume	104
Issue number	3
DOIs	https://doi.org/10.1063/1.4862669
State	Published - 20 Jan 2014

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abstract = "A measurement methodology involving the synchronous switching of gate to source voltage and drain to source voltage (VDS) was proposed for determining the shift of threshold voltage after an AlGaN/GaN heterostructure transistor endures high VDS off-state stress. The measurement results indicated slow electron detrapping behavior. The trap level was determined as (EC - 0.6 eV). Simulation tool was used to analyze the measurement results. The simulation results were consistent with the experimental results; and a relationship between the buffer trap and threshold voltage shift over time was observed.",

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AU - Chen, Y. L.

AU - Chen, C. H.

AU - Chyi, J. I.

AU - Hsin, Y. M.

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Y1 - 2014/1/20

N2 - A measurement methodology involving the synchronous switching of gate to source voltage and drain to source voltage (VDS) was proposed for determining the shift of threshold voltage after an AlGaN/GaN heterostructure transistor endures high VDS off-state stress. The measurement results indicated slow electron detrapping behavior. The trap level was determined as (EC - 0.6 eV). Simulation tool was used to analyze the measurement results. The simulation results were consistent with the experimental results; and a relationship between the buffer trap and threshold voltage shift over time was observed.

AB - A measurement methodology involving the synchronous switching of gate to source voltage and drain to source voltage (VDS) was proposed for determining the shift of threshold voltage after an AlGaN/GaN heterostructure transistor endures high VDS off-state stress. The measurement results indicated slow electron detrapping behavior. The trap level was determined as (EC - 0.6 eV). Simulation tool was used to analyze the measurement results. The simulation results were consistent with the experimental results; and a relationship between the buffer trap and threshold voltage shift over time was observed.

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The behavior of off-state stress-induced electrons trapped at the buffer layer in AlGaN/GaN heterostructure field effect transistors

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