Testing priority address encoder faults of content addressable memories

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations


Content addressable memory (CAM) is one key component in many digital systems. Although the CAM cell usually is implemented with a RAM cell and a comparison logic, the CAM testing is more difficult than the RAM testing. Also, the CAM testing is very different from the RAM testing. Most stuck-at faults (SAFs) in the RAM peripheral circuitry can be mapped to the RAM cell faults. This cannot be analogous to the testing of the priority encoder of CAMs. This paper presents a test algorithm for testing SAFs of the priority encoder in a CAM. The test algorithm only requires 3N-2 Write operations and N+2 Compare operations to cover 100% stuck-at faults of the CMOS priority encoder of an N x B-bit CAM. Compared with typical tests for CAM cell array faults, the fault coverage of SAFs in the priority encoder is increased from 90.2% or 60.5% to 100% for a CAM with 64 words.

Original languageEnglish
Title of host publicationIEEE International Test Conference, Proceedings, ITC 2005
Number of pages8
StatePublished - 2005
EventIEEE International Test Conference, ITC 2005 - Austin, TX, United States
Duration: 8 Nov 200510 Nov 2005

Publication series

NameProceedings - International Test Conference
ISSN (Print)1089-3539


ConferenceIEEE International Test Conference, ITC 2005
Country/TerritoryUnited States
CityAustin, TX


  • Comparison faults
  • Content addressable memories
  • Priority address encoder faults


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