Testing of Configurable 8T SRAMs for In-Memory Computing

Jin Fu Li, Tsai Ling Tsai, Chun Lung Hsu, Chi Tien Sun

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

10 Scopus citations


In-memory computing (IMC) architecture has been considered as an alternative for overcoming the memory wall of von-Neumann computing architecture. Various IMC memories using 8T static random access memory (SRAM) cell have been reported. Some of them, the memory array can provide SRAM and ternary content addressable memory (TCAM) function. In this paper, a March-like test algorithm is proposed, which requires 10 × 2p Read/Write operations, (2q + 4m) Compare operation, and (2r+1 + 4m) Erase operations to cover simple SRAM faults and TCAM Comparison faults, for an IMC 8T SRAM providing 2p ×w-bit SRAM and m× 2q-1-bit TCAM, where p = q+r and m = 2r ×w.

Original languageEnglish
Title of host publicationProceedings - 2020 IEEE 29th Asian Test Symposium, ATS 2020
PublisherIEEE Computer Society
ISBN (Electronic)9781728174679
StatePublished - 23 Nov 2020
Event29th IEEE Asian Test Symposium, ATS 2020 - Penang, Malaysia
Duration: 22 Nov 202025 Nov 2020

Publication series

NameProceedings of the Asian Test Symposium
ISSN (Print)1081-7735


Conference29th IEEE Asian Test Symposium, ATS 2020


  • content addressable memory
  • In-memory computing
  • March-like test
  • static random access memory
  • testing


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