@inproceedings{525f40566d0e49bbae05aab914e0d696,
title = "Testing crosstalk faults of data and address buses in embedded RAMs",
abstract = "Random access memories (RAMs) have many long parallel wires which incur a greater probability for excessive crosstalk coupling effect. This paper presents a test algorithm for detecting crosstalk faults of address and data buses in RAMs. The test algorithm requires 12n+2m+2 Read/Write operations to cover 100% crosstalk faults for a RAM with m-bit addresses, n-bit data inputs/outputs. A BIST supporting March-CW and the proposed test is also implemented. Experimental results show that the area cost of the BIST is only about 3.1% for an 8K× 16-bit RAM based on TSMC 0.18μm standard cell library.",
author = "Yu, {Jiunn Der} and Li, {Jin Fu} and Tseng, {Tsu Wei}",
year = "2007",
doi = "10.1109/VDAT.2007.373218",
language = "???core.languages.en_GB???",
isbn = "1424405831",
series = "2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers",
booktitle = "2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 - Proceedings of Technical Papers",
note = "2007 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2007 ; Conference date: 25-04-2007 Through 27-04-2007",
}