@inproceedings{dd79a21dcc76499f85469f8749bf8f88,
title = "Test and repair scheduling for built-in self-repair RAMs in SOCs",
abstract = "Built-in self-repair (BISR) is one promising approach for improving the yield of memory cores in an system-on-chip (SOC). This paper presents a test scheduling approach for BISR memory cores under the constraint of maximum power consumption. An efficient test scheduling algorithm based on the early-abort probability is proposed. Experimental results show that the scheduled results of the proposed algorithm have lower expected test time in comparison with the previous work. For ITC'02 benchmarks, for example, about 10.7% average reduction ratio of expected test time can be achieved by the proposed algorithm.",
author = "Hou, {Chih Sheng} and Li, {Jin Fu} and Chou, {Che Wei}",
year = "2010",
doi = "10.1109/DELTA.2010.42",
language = "???core.languages.en_GB???",
isbn = "9780769539782",
series = "Proceedings - 5th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2010",
pages = "3--7",
booktitle = "Proceedings - 5th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2010",
note = "5th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2010 ; Conference date: 13-01-2010 Through 15-01-2010",
}