System implementation of I-phone hardware by using low bit rate speech coding

Ruei Xi Chen; Mei Juan Chen; Liang Gee Chen; Tsung Han Tsai

System implementation of I-phone hardware by using low bit rate speech coding

Ruei Xi Chen
, Mei Juan Chen
, Liang Gee Chen
, Tsung Han Tsai

Department of Electrical Engineering

Research output: Contribution to conference › Paper › peer-review

Abstract

This paper presents a system implementation for Internet-phone communication with real-time speech coding schemes. A low-cost speech processing coprocessor is embedded. A CPLD device is used to implement the interface between the host processor and the coprocessor via conventional parallel port. At the headphone interface, there are a 16-bits PCM CODEC and an audio amplifier with acoustic echo cancellation features employed. The system consists of a mixed implementation of software and hardware. The experimental coding rate is 8.5 kbps. In such rate, a 14.4 kbps or higher speed modem can conform to offer full-duplex speech for the applications such as digital simultaneous voice data (DSVD).

Original language	English
Pages	489-499
Number of pages	11
State	Published - 1997
Event	Proceedings of the 1997 IEEE Workshop on Signal Processing Systems, SiPS 97: Design and Implementation - Leicester, UK Duration: 3 Nov 1997 → 5 Nov 1997

Conference

Conference	Proceedings of the 1997 IEEE Workshop on Signal Processing Systems, SiPS 97: Design and Implementation
City	Leicester, UK
Period	3/11/97 → 5/11/97

Cite this

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title = "System implementation of I-phone hardware by using low bit rate speech coding",

abstract = "This paper presents a system implementation for Internet-phone communication with real-time speech coding schemes. A low-cost speech processing coprocessor is embedded. A CPLD device is used to implement the interface between the host processor and the coprocessor via conventional parallel port. At the headphone interface, there are a 16-bits PCM CODEC and an audio amplifier with acoustic echo cancellation features employed. The system consists of a mixed implementation of software and hardware. The experimental coding rate is 8.5 kbps. In such rate, a 14.4 kbps or higher speed modem can conform to offer full-duplex speech for the applications such as digital simultaneous voice data (DSVD).",

author = "Chen, \{Ruei Xi\} and Chen, \{Mei Juan\} and Chen, \{Liang Gee\} and Tsai, \{Tsung Han\}",

year = "1997",

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AU - Chen, Ruei Xi

AU - Chen, Mei Juan

AU - Chen, Liang Gee

AU - Tsai, Tsung Han

PY - 1997

Y1 - 1997

N2 - This paper presents a system implementation for Internet-phone communication with real-time speech coding schemes. A low-cost speech processing coprocessor is embedded. A CPLD device is used to implement the interface between the host processor and the coprocessor via conventional parallel port. At the headphone interface, there are a 16-bits PCM CODEC and an audio amplifier with acoustic echo cancellation features employed. The system consists of a mixed implementation of software and hardware. The experimental coding rate is 8.5 kbps. In such rate, a 14.4 kbps or higher speed modem can conform to offer full-duplex speech for the applications such as digital simultaneous voice data (DSVD).

AB - This paper presents a system implementation for Internet-phone communication with real-time speech coding schemes. A low-cost speech processing coprocessor is embedded. A CPLD device is used to implement the interface between the host processor and the coprocessor via conventional parallel port. At the headphone interface, there are a 16-bits PCM CODEC and an audio amplifier with acoustic echo cancellation features employed. The system consists of a mixed implementation of software and hardware. The experimental coding rate is 8.5 kbps. In such rate, a 14.4 kbps or higher speed modem can conform to offer full-duplex speech for the applications such as digital simultaneous voice data (DSVD).

UR - https://www.scopus.com/pages/publications/0031376068

M3 - 會議論文

AN - SCOPUS:0031376068

SP - 489

EP - 499

T2 - Proceedings of the 1997 IEEE Workshop on Signal Processing Systems, SiPS 97: Design and Implementation

Y2 - 3 November 1997 through 5 November 1997

ER -

System implementation of I-phone hardware by using low bit rate speech coding

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Conference

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