Structure-based specification-constrained test frequency generation for linear analog circuits

Soon Jyh Chang, Chung Len Lee, Jwu E. Chen

Research output: Contribution to journalArticlepeer-review


In this paper, an approach to generating the sinusoidal stimulus of the right frequency of a linear analog circuit for testing circuit parameter faults under the constraints of the specifications of the circuit under test (CUT) is presented. This approach considers tolerance bounds due to fabrication process fluctuations of tested parameters using a statistical model and maps them to an accepted region of the observed signature of the CUT. The generated test stimulus is derived based on a proposed testing confidence level. Test generation procedures for both the monotonic and non-monotonic relationships between the signature and the parameter are proposed and demonstrated. The procedures are applied to a continuous time state-variable filter example circuit to show the effectiveness of the methodology.

Original languageEnglish
Pages (from-to)637-651
Number of pages15
JournalJournal of Information Science and Engineering
Issue number4
StatePublished - Jul 2003


  • Analog IC test
  • Monte-Carlo analysis
  • Specification test
  • Structural test
  • Test pattern generation


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