Static divided word matching line for low-power content addressable memory design

Kuo Hsing Cheng, Chia Hung Wei, Shu Yu Jiang

Research output: Contribution to journalConference articlepeer-review

24 Scopus citations


In this paper, a novel Content Addressable Memory (CAM) word structure with divided word matching line for low-power application is proposed. To reduce the comparison power consumption, the proposed CAM word structure adopts static circuit design to improve the overall system reliability and reduce the power consumption. In addition, a new CAM cell with single bit line circuit design is proposed. The single bit line design requires only one heavy loading bit line, and prevents the frequently switching that designed in conventional basic CAM cell. Based on TSMC 0.25 μm CMOS process with 2.5 V supply voltage, a 128 words by 32 bits CAM is designed. The simulation result shows that the power consumption of the proposed CAM is 17.12 mW under 300 MHz operation frequency.

Original languageEnglish
Pages (from-to)II629-II632
JournalProceedings - IEEE International Symposium on Circuits and Systems
StatePublished - 2004
Event2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada
Duration: 23 May 200426 May 2004


Dive into the research topics of 'Static divided word matching line for low-power content addressable memory design'. Together they form a unique fingerprint.

Cite this