SLOPE: A test pattern generator based on stop line oriented path end algorithm

Shih Jen Chuang; Chung Len Lee; Wen Zen Shen; Chein Wei Jen; Jwu E. Chen; Sen Chung Jing; Ming Der Chen

SLOPE: A test pattern generator based on stop line oriented path end algorithm

Shih Jen Chuang, Chung Len Lee, Wen Zen Shen, Chein Wei Jen, Jwu E. Chen, Sen Chung Jing, Ming Der Chen

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

The authors presents a test pattern generator, SLOPE, based on the stop line oriented path end algorithm, for combinational digital circuits. It combines the advantages of FAN and FAST by utilizing a controllability measure and observability measure to assist guessing in the test generation process. With some strategies adopted in the algorithm, it generates tests with fewer number of backtrackings. Benchmark circuits run with SLOPE show that it outperforms PODEM and FAN for most circuits.

Original language	English
Title of host publication	Proceedings - IEEE International Symposium on Circuits and Systems
Publisher	Publ by IEEE
Pages	437-439
Number of pages	3
ISBN (Print)	9517212399
State	Published - 1988

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	1
ISSN (Print)	0271-4310

Cite this

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title = "SLOPE: A test pattern generator based on stop line oriented path end algorithm",

abstract = "The authors presents a test pattern generator, SLOPE, based on the stop line oriented path end algorithm, for combinational digital circuits. It combines the advantages of FAN and FAST by utilizing a controllability measure and observability measure to assist guessing in the test generation process. With some strategies adopted in the algorithm, it generates tests with fewer number of backtrackings. Benchmark circuits run with SLOPE show that it outperforms PODEM and FAN for most circuits.",

author = "Chuang, {Shih Jen} and Lee, {Chung Len} and Shen, {Wen Zen} and Jen, {Chein Wei} and Chen, {Jwu E.} and Jing, {Sen Chung} and Chen, {Ming Der}",

year = "1988",

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isbn = "9517212399",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

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SLOPE: A test pattern generator based on stop line oriented path end algorithm. / Chuang, Shih Jen; Lee, Chung Len; Shen, Wen Zen et al.
Proceedings - IEEE International Symposium on Circuits and Systems. Publ by IEEE, 1988. p. 437-439 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 1).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - SLOPE

T2 - A test pattern generator based on stop line oriented path end algorithm

AU - Chuang, Shih Jen

AU - Lee, Chung Len

AU - Shen, Wen Zen

AU - Jen, Chein Wei

AU - Chen, Jwu E.

AU - Jing, Sen Chung

AU - Chen, Ming Der

PY - 1988

Y1 - 1988

N2 - The authors presents a test pattern generator, SLOPE, based on the stop line oriented path end algorithm, for combinational digital circuits. It combines the advantages of FAN and FAST by utilizing a controllability measure and observability measure to assist guessing in the test generation process. With some strategies adopted in the algorithm, it generates tests with fewer number of backtrackings. Benchmark circuits run with SLOPE show that it outperforms PODEM and FAN for most circuits.

AB - The authors presents a test pattern generator, SLOPE, based on the stop line oriented path end algorithm, for combinational digital circuits. It combines the advantages of FAN and FAST by utilizing a controllability measure and observability measure to assist guessing in the test generation process. With some strategies adopted in the algorithm, it generates tests with fewer number of backtrackings. Benchmark circuits run with SLOPE show that it outperforms PODEM and FAN for most circuits.

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M3 - 會議論文篇章

AN - SCOPUS:0024122980

SN - 9517212399

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

SP - 437

EP - 439

BT - Proceedings - IEEE International Symposium on Circuits and Systems

PB - Publ by IEEE

ER -

SLOPE: A test pattern generator based on stop line oriented path end algorithm

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