Sequential redundant fault identification scheme and its application to test generation

Hsing Chung Liang, Chung Len Lee, Jwu E. Chen

Research output: Contribution to journalConference articlepeer-review

4 Scopus citations

Abstract

This work presents an efficient method to identify sequential redundant faults. The method is based on a simple procedure to identify the flip-flops which cannot be initialized and the circuit lines which cannot be controlled to definite values. The redundant faults are classified into four types and the method can identify each type of them. The method has been experimentally incorporated into a test generation system and the results show that it is very efficient in identifying redundant faults and improving the efficiency of a test generation system.

Original languageEnglish
Pages (from-to)57-62
Number of pages6
JournalProceedings of the Asian Test Symposium
StatePublished - 1994
EventProceedings of the 3rd Asian Test Symposium - Nara, Jpn
Duration: 15 Nov 199417 Nov 1994

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