Recycling Test Methods to Improve Test Capacity and Increase Chip Shipments

Chung Huang Yeh, Jwu E. Chen

Research output: Contribution to journalArticlepeer-review

5 Scopus citations

Abstract

In this research, we quantified semiconductor fabrication capability parameters and test capability parameters and used a digital integrated circuit test model (DITM) to discuss the impact of the test guardband (TGB) on test yield. Furthermore, the DITM can be used to estimate the yield distribution trend of future semiconductor products using data from the IEEE International Roadmap for Devices and Systems (IRDS) 2021 Table. With the COVID-19 pandemic, the global semiconductor industry is facing chip and material shortages. Furthermore, test technology lags behind semiconductor manufacturing technology, and the test yield of production capacity is deteriorating, seriously affecting the entire semiconductor supply chain. Therefore, we proposed the recycling test method, extending the test time, moving TGB, and repeatedly looking for reliable products. These parameters were calculated using the estimated product parameters released by the IRDS 2021. We proved that the proposed recycling test method could improve the high-yield target of semiconductor testing. As long as test methods are used properly, not only can high-yield shipments be made, but also companies’ overall profit will be significantly improved, and the problem of chip shortages will be solved.

Original languageEnglish
Pages (from-to)45-52
Number of pages8
JournalIEEE Design and Test
Volume40
Issue number3
DOIs
StatePublished - 1 Jun 2023

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