RADAR: A Fast and Energy-Efficient Programming Technique for Multiple Bits-Per-Cell RRAM Arrays

Binh Q. Le, Akash Levy, Tony F. Wu, Robert M. Radway, E. Ray Hsieh, Xin Zheng, Mark Nelson, Priyanka Raina, H. S.Philip Wong, Simon Wong, Subhasish Mitra

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

HfO2-based resistive RAM (RRAM) is an emerging nonvolatile memory technology that has recently been shown capable of storing multiple bits-per-cell. The energy/delay costs of an RRAM write operation are dependent on the number of pulses required for RRAM programming. The pulse count is often large when existing programming approaches are used for multiple bits-per-cell RRAM, especially when resistance ranges are allocated to account for retention. We present a new technique, Range-Dependent Adaptive Resistance (RADAR) Tuning, for fast and energy-efficient programming of multiple bits-per-cell RRAM arrays, using a combination of coarse- and fine-grained RRAM resistance tuning. Experimental data are collected on 16k cells from two 1Megacell (1M physical cells) 1T1R HfO2-based RRAM arrays fabricated in a 130-nm CMOS process. RADAR reduces the programming pulse count by 2.4X (for both uncycled cells and cells that have undergone 8k cycles) on average over existing programming techniques tested on the same RRAM arrays, with the same bit error rate targets.

Original languageEnglish
Article number9497347
Pages (from-to)4397-4403
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume68
Issue number9
DOIs
StatePublished - Sep 2021

Keywords

  • Energy-efficient memory
  • HfOresistive RAM (RRAM)
  • RRAM programming
  • multiple bits-per-cell RRAM
  • nonvolatile memory

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