Optimization techniques of AAC decoder on PACDSP VLIW processor

Chun Nan Liu, Jui Hong Hung, Tsung Han Tsai

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

MPEG AAC has been widely used in variant applications and there are several standards developed based on the AAC. Considering to the trade-off between flexibility and performance, the DSP is adopted for implementation. The power consumption is an important issue for portable devices and there are limited resources on the DSP. However, due to the complex algorithms in AAC, design optimizations are required to reduce the power consumption and the memory utilization. Besides, the traditional algorithms usually not addressed on the optimization of VLIW based DSP. In this paper, we propose optimization techniques for the AAC decoding blocks on a VLIW based PACDSP processor. The realized decoder can be operated at a lower frequency of only 15 MHz and needs only 27 Kbytes of program memory and 27 Kbytes of data memory.

Original languageEnglish
Title of host publication2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Pages1468-1471
Number of pages4
DOIs
StatePublished - 2008
Event2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States
Duration: 18 May 200821 May 2008

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Country/TerritoryUnited States
CitySeattle, WA
Period18/05/0821/05/08

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