Abstract
This paper describes a high-throughput scalable architecture for full-search block-matching algorithm (FSBMA). The number of processing elements (PEs) is scalable according to the variable algorithm parameters and the performance required for different applications. By use of the efficient PE-rings and the intelligent memory-interleaving organization, the efficiency of the architecture can be increased. Techniques for reducing interconnections and external memory accesses are also presented. Our results demonstrate that the scalable PE-ringed architecture is a flexible and high-performance solution for FSBMA.
| Original language | English |
|---|---|
| Pages (from-to) | 1229-1232 |
| Number of pages | 4 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 2 |
| State | Published - 1997 |
| Event | Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4) - Hong Kong, Hong Kong Duration: 9 Jun 1997 → 12 Jun 1997 |