NBTI-aware digital LDO design for edge devices in IoT systems

Yu Guang Chen; Yu Yi Lin

doi:10.1109/CSTIC.2019.8755701

NBTI-aware digital LDO design for edge devices in IoT systems

Yu Guang Chen, Yu Yi Lin

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

Digital low dropout voltage regulators (DLDOs) have been widely applied to emerging edge devices of IoT systems due to the benefit of simply designing, easily integrating to edge devices, and fast responding. Conventional DLDOs insert parallel pMOSs between V_in and V_out, and use a digital controller to turn on appropriate number of pMOSs to obtain required V_out. The turned on pMOSs are suffering from non-negligible Negative-Bias Temperature Instability (NBTI) effect and therefore the power integrity cannot be guaranteed after aging. To mitigate the NBTI effect and to extend the lifetime of DLDOs (as well as the whole circuit), in this paper we propose an improved NBTI-aware DLDO design which uniformly turns on pMOS to avoid bias aging. Experimental results show that with our design, we can achieve 20% DLDO lifetime extension.

Original language	English
Title of host publication	China Semiconductor Technology International Conference 2019, CSTIC 2019
Editors	Cor Claeys, Ru Huang, Hanming Wu, Qinghuang Lin, Steve Liang, Peilin Song, Zhen Guo, Kafai Lai, Ying Zhang, Xinping Qu, Hsiang-Lan Lung, Wenjian Yu
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781538674437
DOIs	https://doi.org/10.1109/CSTIC.2019.8755701
State	Published - Mar 2019
Event	2019 China Semiconductor Technology International Conference, CSTIC 2019 - Shanghai, China Duration: 18 Mar 2019 → 19 Mar 2019

Publication series

Name	China Semiconductor Technology International Conference 2019, CSTIC 2019

Conference

Conference	2019 China Semiconductor Technology International Conference, CSTIC 2019
Country/Territory	China
City	Shanghai
Period	18/03/19 → 19/03/19

Keywords

Digital LDO
NBTI effect
Power integrity

Access to Document

10.1109/CSTIC.2019.8755701

Cite this

Chen, Y. G., & Lin, Y. Y. (2019). NBTI-aware digital LDO design for edge devices in IoT systems. In C. Claeys, R. Huang, H. Wu, Q. Lin, S. Liang, P. Song, Z. Guo, K. Lai, Y. Zhang, X. Qu, H.-L. Lung, & W. Yu (Eds.), China Semiconductor Technology International Conference 2019, CSTIC 2019 Article 8755701 (China Semiconductor Technology International Conference 2019, CSTIC 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CSTIC.2019.8755701

Chen, Yu Guang ; Lin, Yu Yi. / NBTI-aware digital LDO design for edge devices in IoT systems. China Semiconductor Technology International Conference 2019, CSTIC 2019. editor / Cor Claeys ; Ru Huang ; Hanming Wu ; Qinghuang Lin ; Steve Liang ; Peilin Song ; Zhen Guo ; Kafai Lai ; Ying Zhang ; Xinping Qu ; Hsiang-Lan Lung ; Wenjian Yu. Institute of Electrical and Electronics Engineers Inc., 2019. (China Semiconductor Technology International Conference 2019, CSTIC 2019).

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title = "NBTI-aware digital LDO design for edge devices in IoT systems",

abstract = "Digital low dropout voltage regulators (DLDOs) have been widely applied to emerging edge devices of IoT systems due to the benefit of simply designing, easily integrating to edge devices, and fast responding. Conventional DLDOs insert parallel pMOSs between Vin and Vout, and use a digital controller to turn on appropriate number of pMOSs to obtain required Vout. The turned on pMOSs are suffering from non-negligible Negative-Bias Temperature Instability (NBTI) effect and therefore the power integrity cannot be guaranteed after aging. To mitigate the NBTI effect and to extend the lifetime of DLDOs (as well as the whole circuit), in this paper we propose an improved NBTI-aware DLDO design which uniformly turns on pMOS to avoid bias aging. Experimental results show that with our design, we can achieve 20% DLDO lifetime extension.",

keywords = "Digital LDO, NBTI effect, Power integrity",

author = "Chen, {Yu Guang} and Lin, {Yu Yi}",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 China Semiconductor Technology International Conference, CSTIC 2019 ; Conference date: 18-03-2019 Through 19-03-2019",

year = "2019",

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doi = "10.1109/CSTIC.2019.8755701",

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series = "China Semiconductor Technology International Conference 2019, CSTIC 2019",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

editor = "Cor Claeys and Ru Huang and Hanming Wu and Qinghuang Lin and Steve Liang and Peilin Song and Zhen Guo and Kafai Lai and Ying Zhang and Xinping Qu and Hsiang-Lan Lung and Wenjian Yu",

booktitle = "China Semiconductor Technology International Conference 2019, CSTIC 2019",

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Chen, YG & Lin, YY 2019, NBTI-aware digital LDO design for edge devices in IoT systems. in C Claeys, R Huang, H Wu, Q Lin, S Liang, P Song, Z Guo, K Lai, Y Zhang, X Qu, H-L Lung & W Yu (eds), China Semiconductor Technology International Conference 2019, CSTIC 2019., 8755701, China Semiconductor Technology International Conference 2019, CSTIC 2019, Institute of Electrical and Electronics Engineers Inc., 2019 China Semiconductor Technology International Conference, CSTIC 2019, Shanghai, China, 18/03/19. https://doi.org/10.1109/CSTIC.2019.8755701

NBTI-aware digital LDO design for edge devices in IoT systems. / Chen, Yu Guang; Lin, Yu Yi.
China Semiconductor Technology International Conference 2019, CSTIC 2019. ed. / Cor Claeys; Ru Huang; Hanming Wu; Qinghuang Lin; Steve Liang; Peilin Song; Zhen Guo; Kafai Lai; Ying Zhang; Xinping Qu; Hsiang-Lan Lung; Wenjian Yu. Institute of Electrical and Electronics Engineers Inc., 2019. 8755701 (China Semiconductor Technology International Conference 2019, CSTIC 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - NBTI-aware digital LDO design for edge devices in IoT systems

AU - Chen, Yu Guang

AU - Lin, Yu Yi

PY - 2019/3

Y1 - 2019/3

N2 - Digital low dropout voltage regulators (DLDOs) have been widely applied to emerging edge devices of IoT systems due to the benefit of simply designing, easily integrating to edge devices, and fast responding. Conventional DLDOs insert parallel pMOSs between Vin and Vout, and use a digital controller to turn on appropriate number of pMOSs to obtain required Vout. The turned on pMOSs are suffering from non-negligible Negative-Bias Temperature Instability (NBTI) effect and therefore the power integrity cannot be guaranteed after aging. To mitigate the NBTI effect and to extend the lifetime of DLDOs (as well as the whole circuit), in this paper we propose an improved NBTI-aware DLDO design which uniformly turns on pMOS to avoid bias aging. Experimental results show that with our design, we can achieve 20% DLDO lifetime extension.

AB - Digital low dropout voltage regulators (DLDOs) have been widely applied to emerging edge devices of IoT systems due to the benefit of simply designing, easily integrating to edge devices, and fast responding. Conventional DLDOs insert parallel pMOSs between Vin and Vout, and use a digital controller to turn on appropriate number of pMOSs to obtain required Vout. The turned on pMOSs are suffering from non-negligible Negative-Bias Temperature Instability (NBTI) effect and therefore the power integrity cannot be guaranteed after aging. To mitigate the NBTI effect and to extend the lifetime of DLDOs (as well as the whole circuit), in this paper we propose an improved NBTI-aware DLDO design which uniformly turns on pMOS to avoid bias aging. Experimental results show that with our design, we can achieve 20% DLDO lifetime extension.

KW - Digital LDO

KW - NBTI effect

KW - Power integrity

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U2 - 10.1109/CSTIC.2019.8755701

DO - 10.1109/CSTIC.2019.8755701

M3 - 會議論文篇章

AN - SCOPUS:85069454396

T3 - China Semiconductor Technology International Conference 2019, CSTIC 2019

BT - China Semiconductor Technology International Conference 2019, CSTIC 2019

A2 - Claeys, Cor

A2 - Huang, Ru

A2 - Wu, Hanming

A2 - Lin, Qinghuang

A2 - Liang, Steve

A2 - Song, Peilin

A2 - Guo, Zhen

A2 - Lai, Kafai

A2 - Zhang, Ying

A2 - Qu, Xinping

A2 - Lung, Hsiang-Lan

A2 - Yu, Wenjian

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2019 China Semiconductor Technology International Conference, CSTIC 2019

Y2 - 18 March 2019 through 19 March 2019

ER -

Chen YG, Lin YY. NBTI-aware digital LDO design for edge devices in IoT systems. In Claeys C, Huang R, Wu H, Lin Q, Liang S, Song P, Guo Z, Lai K, Zhang Y, Qu X, Lung HL, Yu W, editors, China Semiconductor Technology International Conference 2019, CSTIC 2019. Institute of Electrical and Electronics Engineers Inc. 2019. 8755701. (China Semiconductor Technology International Conference 2019, CSTIC 2019). doi: 10.1109/CSTIC.2019.8755701

NBTI-aware digital LDO design for edge devices in IoT systems

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