Multifunctional integrated substrate technology for high density SOP packaging

Fuhan Liu, Rao R. Tummala, Venky Sundaram, Daniel Guidotti, Zhaoran Huang, Y. J. Chang, Isaac Robin Abothu, P. M. Raj, Swapan Bhattacharya, Devarajan Balaraman, G. K. Chang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

Advanced substrates or printed circuit boards (PCBs) are an essential part for building the advanced IC packages (EGA, CSP, flip chip and wafer-level package), MCMs, 3D package, system-in-package (SiP), system-on-package (SOP), and all high density microelectronic systems. As processors and memory move towards nanometer-size features and processor clock speeds increase 60% per year, development of next generation system level substrates technology is required to keep pace both the wiring density and high performance requirements. The packaging research center at Georgia Tech has been developing system-on-package (SOP) technology for future high density, high performance systems. This paper introduces three important aspects for future advanced package substrates or PCBs for high density and high performance systems applications. They are (1) ultra-high density wiring technology with ultra fine circuit traces and microvias, including novel non-conformal stacked vias. The ultra high wiring density substrate is critical for the use of fine pitch, high I/O count, flip chip application and microsystem miniaturization. (2) Integrations of passive components, and (3) integrations of high speed optical interconnects for chip-to-chip data link. This will be the revolutionary advance in future PCBs. We have developed ultra high density wiring technology by a combination of ultra-fine lines and space of 10 μm or less and stacked microvias. We have developed optically smooth organic surfaces for optical components integration and have demonstrated a 10 Gbps chip-to-chip data rate on PCBs. The future high density, high performance, microsystems can be realized by the combinations of high density wiring technology and optoelectronics integration. Details of this work are the subject of this paper.

Original languageEnglish
Title of host publicationProceedings of the Sixth IEEE CPMT Conference on High Density Microsystem Design and Packaging and Component Failure Analysis, HDP'04
Pages83-90
Number of pages8
StatePublished - 2004
EventProceedings of the Sixth IEEE CPMT Conference on High Density Microsystem Design and Packaging and Component Failure Analysis, HDP'04 - Shanghai, China
Duration: 30 Jun 20043 Jul 2004

Publication series

NameProceedings of the Sixth IEEE CPMT Conference on High Density Microsystem Design and Packaging and Component Failure Analysis, HDP'04

Conference

ConferenceProceedings of the Sixth IEEE CPMT Conference on High Density Microsystem Design and Packaging and Component Failure Analysis, HDP'04
Country/TerritoryChina
CityShanghai
Period30/06/043/07/04

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