Modeling and Testing comparison faults for ternary content addressable memories

Keyphrases

• Ternary Content Addressable Memory 100%
• Comparison Faults 100%
• Testing Algorithm 60%
• Stuck-at Faults 40%
• Transistor 20%
• Built-in-self-test (BiST) 20%
• Area Cost 20%
• Time Complexity 20%
• Write Operation 20%
• Fault Model 20%
• Low Computational Complexity 20%
• Circuitry 20%
• Low Area 20%
• Stuck-open 20%
• Erase Operation 20%
• Physical Defects 20%

Computer Science

• Test Algorithm 100%
• ternary content-addressable memory 100%
• ternary content addressable memory 100%
• Time Complexity 66%
• build-in self-test 33%
• Write Operation 33%
• Erase Operation 33%