Modeling and design of an improved current-fed converter with new voltage multiplier circuit combination

Yi Hung Liao, Ching Ming Lai, Yu Lung Ke

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

The objective of this paper is focused on developing an improved current-fed converter with new voltage multiplier circuit for low-voltage distributed energy systems. The proposed four-phase current-fed converter is with interleaved configuration and preserving the inherent advantage with smaller input current ripple. Through the proposed topology, the high voltage gain can be achieved using the relatively lower transformer turns ratio. Also, the voltage stresses of both active switches and diodes are greatly reduced so that the low on-resistance switches can be adopted and the reverse-recovery effect of diodes can be decreased naturally. The DC and AC small signal models of the proposed converter are derived for better closed loop control, and some design guidelines are then given for circuit implementation. Both simulation and experimental results indeed verify the effectiveness of the proposed converter.

Original languageEnglish
Title of host publication2011 IEEE Industry Applications Society Annual Meeting, IAS 2011
DOIs
StatePublished - 2011
Event2011 46th IEEE Industry Applications Society Annual Meeting, IAS 2011 - Orlando, FL, United States
Duration: 9 Oct 201113 Oct 2011

Publication series

NameConference Record - IAS Annual Meeting (IEEE Industry Applications Society)
ISSN (Print)0197-2618

Conference

Conference2011 46th IEEE Industry Applications Society Annual Meeting, IAS 2011
Country/TerritoryUnited States
CityOrlando, FL
Period9/10/1113/10/11

Keywords

  • Current-fed Converter
  • High Step-up Ratio
  • Low Switch Voltage Stress
  • Voltage Multiplier

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