Low-cost parallel FFT processors with conflict-free ROM-based twiddle factor generator for DVB-T2 applications

Ping Chang Jui, Chin Long Wey, Muh Tian Shiue

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

This paper presents a conflict-free ROM addressing scheme for generating the TF tables. Basically, the conventional (N/2)-words ROM table for the Radix-2 Memory-Based FFT (MBFFT) processor with single process element (PE) is equally partitioned into 2p sub-tables allowing all 2p PEs to simultaneously access the twiddle factors without causing any conflict. This study presents the use of MBFFT processor with 4 parallel PEs. Result show that the proposed scheme can reduce the chip area of DVB-T2 applications by 18.85%. The hardware reduction is of significance.

Original languageEnglish
Title of host publication2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013
Pages1003-1006
Number of pages4
DOIs
StatePublished - 2013
Event2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013 - Columbus, OH, United States
Duration: 4 Aug 20137 Aug 2013

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746

Conference

Conference2013 IEEE 56th International Midwest Symposium on Circuits and Systems, MWSCAS 2013
Country/TerritoryUnited States
CityColumbus, OH
Period4/08/137/08/13

Keywords

  • Butterfly Processing Element (PE)
  • Conflict-free ROM Addressing Scheme
  • Fast Fourier transform (FFT)
  • orthogonal
  • ROM
  • Twiddle Factors

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