Three-dimensional (3-D) integration using through-silicon-via (TSV) is an emerging technology for integrated circuit (IC) design. It has been used in DRAM die stacking extensively. However, yield remains a key issue for volume production of 3-D RAMs. In this paper, we present a point-to-point interconnection structure derived from bus and propose a fault tolerance interface scheme for TSVs and micro bumps to enhance their manufacturing yield in the 3-D RAMs. The interconnection structure is inherently redundant and thus can replace defective TSVs or micro bumps without using repair circuits. Global and local reconfiguration approaches are proposed which benefit distinct situations of the 3-D RAM. Analyses show that the proposed intra-channel reconfigurable interconnection scheme can improve the yield of the 3-D RAM effectively. Compared to the previous solution using an inter-channel reconfigurable interconnection scheme, the yield improvement can be as large as 23% which is very significant.