@inproceedings{3430c59dc77e463faa0cc8a240037d93,
title = "Improved vector compaction for power estimation with multi-sequence sampling technique",
abstract = "A fast and accurate power estimation of circuits is definitely required when the low power issues become more and more important. For large circuits, vector compaction techniques could provide a fast solution for power estimation with reasonable accuracy. In previous work [11], we proposed an efficient vector compaction method with grouping and single-sequence consecutive sampling technique for CMOS circuits. The single-sequence approach improved the losses on compaction ratio and speedup by minimizing the useless transitions in traditional random or random-liked sampling approaches but it still involved some undesired transitions. In this paper, we propose a new consecutive sampling technique, multi-sequence approach. It can dramatically reduce the useless transitions without involving any undesired transitions. Compared to the random sampling and the single-sequence approaches, the experimental results demonstrate that the average compaction ratio and the average speedup can be significantly improved with our multi-sequence approach.",
author = "Hsu, {Chih Yang} and Liu, {Chien Nan Jimmy} and Jou, {Jing Yang}",
note = "Publisher Copyright: {\textcopyright} 2003 IEEE.; null ; Conference date: 06-10-2003 Through 08-10-2003",
year = "2003",
doi = "10.1109/VTSA.2003.1252581",
language = "???core.languages.en_GB???",
series = "International Symposium on VLSI Technology, Systems, and Applications, Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "176--179",
booktitle = "VLSI 2003 - 2003 20th International Symposium on VLSI Technology, Systems and Applications, Proceedings",
}