IEEE standard 1500 compatible oscillation ring test methodology for interconnect delay and crosstalk detection

Katherine Shu Min Li; Chung Len Lee; Chauchin Su; Jwu E. Chen

doi:10.1007/s10836-007-0759-5

IEEE standard 1500 compatible oscillation ring test methodology for interconnect delay and crosstalk detection

Katherine Shu Min Li, Chung Len Lee, Chauchin Su, Jwu E. Chen

Department of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

13 Scopus citations

Abstract

A novel oscillation ring (OR) test scheme and architecture for testing interconnects in SOC is proposed and demonstrated. In addition to stuck-at and open faults, this scheme can also detect delay faults and crosstalk glitches, which are otherwise very difficult to be tested under the traditional test schemes. IEEE Std. 1500 wrapper cells are modified to accommodate the test scheme. An efficient algorithm is proposed to construct ORs for SOC based on a graph model. Experimental results on MCNC benchmark circuits have been included to show the effectiveness of the algorithm. In all experiments, the scheme achieves 100% fault coverage with a small number of tests.

Original language	English
Pages (from-to)	341-355
Number of pages	15
Journal	Journal of Electronic Testing: Theory and Applications (JETTA)
Volume	23
Issue number	4
DOIs	https://doi.org/10.1007/s10836-007-0759-5
State	Published - Aug 2007

Keywords

Crosstalk glitches
Delay faults
IEEE P1500
Interconnect test
Open faults
Oscillation ring (OR) test scheme
SOC testing
Stuck-at faults
Wrapper cell design

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10.1007/s10836-007-0759-5

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title = "IEEE standard 1500 compatible oscillation ring test methodology for interconnect delay and crosstalk detection",

abstract = "A novel oscillation ring (OR) test scheme and architecture for testing interconnects in SOC is proposed and demonstrated. In addition to stuck-at and open faults, this scheme can also detect delay faults and crosstalk glitches, which are otherwise very difficult to be tested under the traditional test schemes. IEEE Std. 1500 wrapper cells are modified to accommodate the test scheme. An efficient algorithm is proposed to construct ORs for SOC based on a graph model. Experimental results on MCNC benchmark circuits have been included to show the effectiveness of the algorithm. In all experiments, the scheme achieves 100% fault coverage with a small number of tests.",

keywords = "Crosstalk glitches, Delay faults, IEEE P1500, Interconnect test, Open faults, Oscillation ring (OR) test scheme, SOC testing, Stuck-at faults, Wrapper cell design",

author = "Li, {Katherine Shu Min} and Lee, {Chung Len} and Chauchin Su and Chen, {Jwu E.}",

note = "Funding Information: The work of Katherine Shu-Min Li was supported in part by National Science Council of Taiwan under Grant No. NSC 95-2218-E-110-009. The work of Chauchin Su was partially supported by National Science Council of Taiwan under Grant Nos. NSC 95-2221-E-009-328 MY3 and NSC 95-2221-E-009-334.",

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AU - Li, Katherine Shu Min

AU - Lee, Chung Len

AU - Su, Chauchin

AU - Chen, Jwu E.

N1 - Funding Information: The work of Katherine Shu-Min Li was supported in part by National Science Council of Taiwan under Grant No. NSC 95-2218-E-110-009. The work of Chauchin Su was partially supported by National Science Council of Taiwan under Grant Nos. NSC 95-2221-E-009-328 MY3 and NSC 95-2221-E-009-334.

PY - 2007/8

Y1 - 2007/8

N2 - A novel oscillation ring (OR) test scheme and architecture for testing interconnects in SOC is proposed and demonstrated. In addition to stuck-at and open faults, this scheme can also detect delay faults and crosstalk glitches, which are otherwise very difficult to be tested under the traditional test schemes. IEEE Std. 1500 wrapper cells are modified to accommodate the test scheme. An efficient algorithm is proposed to construct ORs for SOC based on a graph model. Experimental results on MCNC benchmark circuits have been included to show the effectiveness of the algorithm. In all experiments, the scheme achieves 100% fault coverage with a small number of tests.

AB - A novel oscillation ring (OR) test scheme and architecture for testing interconnects in SOC is proposed and demonstrated. In addition to stuck-at and open faults, this scheme can also detect delay faults and crosstalk glitches, which are otherwise very difficult to be tested under the traditional test schemes. IEEE Std. 1500 wrapper cells are modified to accommodate the test scheme. An efficient algorithm is proposed to construct ORs for SOC based on a graph model. Experimental results on MCNC benchmark circuits have been included to show the effectiveness of the algorithm. In all experiments, the scheme achieves 100% fault coverage with a small number of tests.

KW - Crosstalk glitches

KW - Delay faults

KW - IEEE P1500

KW - Interconnect test

KW - Open faults

KW - Oscillation ring (OR) test scheme

KW - SOC testing

KW - Stuck-at faults

KW - Wrapper cell design

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U2 - 10.1007/s10836-007-0759-5

DO - 10.1007/s10836-007-0759-5

M3 - 期刊論文

AN - SCOPUS:34547917644

SN - 0923-8174

VL - 23

SP - 341

EP - 355

JO - Journal of Electronic Testing: Theory and Applications (JETTA)

JF - Journal of Electronic Testing: Theory and Applications (JETTA)

IS - 4

ER -

IEEE standard 1500 compatible oscillation ring test methodology for interconnect delay and crosstalk detection

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Keywords

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