Identification of robust untestable path delay faults

This paper presents a theoretical analysis to identify robust untestable path delay faults. It first classifies the path reconvergence of fanouts into seven cases and deduces the necessary conditions to robustly test path delay faults for each case. It then proposes a procedure, based on the deduced conditions, to identify the robust untestable path delay faults. The procedure was applied to ISCAS 85' circuits[1] and it was found that the robust untestable faults occupy a high percentage of the total path delay faults. In addition, it also presents a method to estimate the number of robust untestable path delay faults for a circuit.