I-V Characteristics of E-mode GaN-based transistors under gate floating

Zhen Wei Qin, Wen Hsuan Tsai, Wei Chia Chen, Hao Hsuan Lo, Yue Ming Hsin

Research output: Contribution to journalArticlepeer-review

Abstract

This study investigates the I-V behaviors of various E-mode GaN-based transistors under gate floating and zero gate bias. The p-GaN gate high electron mobility transistor (HEMTs), gate injection transistors, and Cascode GaN FETs have been adopted and compared. The high off-state drain current is observed under gate floating except for Cascode GaN FETs based on the measured I-V characteristics. The off-state drain current of p-GaN gate HEMT is up to 0.8 mA under gate floating at a drain bias of 6 V, which is about 107 times larger than zero gate bias. The devices will induce false-turn-on and reverse conduction loss during switching under gate floating due to the capacitance charging effect between the drain and the gate electrodes. The mechanism of the capacitance charging effect is discussed using the equivalent circuit of p-GaN gate HEMTs and confirmed by Silvaco TCAD simulation.

Original languageEnglish
Article number045002
JournalSemiconductor Science and Technology
Volume37
Issue number4
DOIs
StatePublished - Apr 2022

Keywords

  • GIT
  • capacitance charging effect
  • cascode
  • gate floating
  • p-GaN Gate HEMT

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