High-speed, low cost parallel memory-based FFT processors for OFDM applications

Chin Long Wey; Shin Yo Lin; Wei Chien Tang; Muh Tien Shiue

doi:10.1109/ICECS.2007.4511108

High-speed, low cost parallel memory-based FFT processors for OFDM applications

Chin Long Wey, Shin Yo Lin, Wei Chien Tang, Muh Tien Shiue

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

9 Scopus citations

Abstract

Low cost yet efficient FFT (Fast Fourier Transform) processors are greatly needed for real-time operation in many OFDM applications. Taking the advantages of both memory-based and pipelined FFT architectures, this paper presents simple radix-2 memory-based FFT (MBFFT) Processors with low hardware cost and high maximum operation frequency. Results show that the core area of the proposed MBFFT is 1.79mm² with the maximum operation frequency of 205MHz, or a process speed of 269μs for N=8192 points (24 bits per word). This also implies a throughput of 730 Mb/s (Mbits per second). This paper also presents parallel MBFFT structures with two and four butterfly processing elements (PEs), respectively, to improve the latency while still keeping low hardware cost and high maximum operation frequency.

Original language	English
Title of host publication	ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems
Pages	783-787
Number of pages	5
DOIs	https://doi.org/10.1109/ICECS.2007.4511108
State	Published - 2007
Event	14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007 - Marrakech, Morocco Duration: 11 Dec 2007 → 14 Dec 2007

Publication series

Name	Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Conference

Conference	14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007
Country/Territory	Morocco
City	Marrakech
Period	11/12/07 → 14/12/07

Keywords

Fast fourier transform(FFT)
Memory-based FFT
Multi-path delay commutator (MDC) FFT
Orthogonal frequency division multiplexing (OFDM)
Single-path delay feedback (SDF) FFT

Access to Document

10.1109/ICECS.2007.4511108

Cite this

Wey, C. L., Lin, S. Y., Tang, W. C., & Shiue, M. T. (2007). High-speed, low cost parallel memory-based FFT processors for OFDM applications. In ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems (pp. 783-787). Article 4511108 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). https://doi.org/10.1109/ICECS.2007.4511108

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title = "High-speed, low cost parallel memory-based FFT processors for OFDM applications",

abstract = "Low cost yet efficient FFT (Fast Fourier Transform) processors are greatly needed for real-time operation in many OFDM applications. Taking the advantages of both memory-based and pipelined FFT architectures, this paper presents simple radix-2 memory-based FFT (MBFFT) Processors with low hardware cost and high maximum operation frequency. Results show that the core area of the proposed MBFFT is 1.79mm2 with the maximum operation frequency of 205MHz, or a process speed of 269μs for N=8192 points (24 bits per word). This also implies a throughput of 730 Mb/s (Mbits per second). This paper also presents parallel MBFFT structures with two and four butterfly processing elements (PEs), respectively, to improve the latency while still keeping low hardware cost and high maximum operation frequency.",

keywords = "Fast fourier transform(FFT), Memory-based FFT, Multi-path delay commutator (MDC) FFT, Orthogonal frequency division multiplexing (OFDM), Single-path delay feedback (SDF) FFT",

author = "Wey, {Chin Long} and Lin, {Shin Yo} and Tang, {Wei Chien} and Shiue, {Muh Tien}",

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Wey, CL, Lin, SY, Tang, WC & Shiue, MT 2007, High-speed, low cost parallel memory-based FFT processors for OFDM applications. in ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems., 4511108, Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, pp. 783-787, 14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007, Marrakech, Morocco, 11/12/07. https://doi.org/10.1109/ICECS.2007.4511108

High-speed, low cost parallel memory-based FFT processors for OFDM applications. / Wey, Chin Long; Lin, Shin Yo; Tang, Wei Chien et al.
ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems. 2007. p. 783-787 4511108 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Wey, Chin Long

AU - Lin, Shin Yo

AU - Tang, Wei Chien

AU - Shiue, Muh Tien

PY - 2007

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N2 - Low cost yet efficient FFT (Fast Fourier Transform) processors are greatly needed for real-time operation in many OFDM applications. Taking the advantages of both memory-based and pipelined FFT architectures, this paper presents simple radix-2 memory-based FFT (MBFFT) Processors with low hardware cost and high maximum operation frequency. Results show that the core area of the proposed MBFFT is 1.79mm2 with the maximum operation frequency of 205MHz, or a process speed of 269μs for N=8192 points (24 bits per word). This also implies a throughput of 730 Mb/s (Mbits per second). This paper also presents parallel MBFFT structures with two and four butterfly processing elements (PEs), respectively, to improve the latency while still keeping low hardware cost and high maximum operation frequency.

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KW - Single-path delay feedback (SDF) FFT

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ER -

High-speed, low cost parallel memory-based FFT processors for OFDM applications

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Keywords

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