High efficient NTSS-based parallel architecture for motion estimation in H.264

Mean Hom Ho, Jau Jiun Huang, Shang Chiang Chin, Chun Lung Hsu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper proposes a parallel architecture design for motion estimation (ME) by using the new three step search (NTSS) block-matching algorithm. The proposed NTSS-based parallel architecture adopts the partition technique to separate the encoded frame into two parts for operating. By using the partition technique, the search time of the proposed NTSS-based parallel architecture can be reduced more than 1/2 times. In other words, the proposed NTSS-base parallel architecture design produces efficient solution for real-time ME required in video application with high speed requirement. Experimental results show that the proposed architecture is the best tradeoff in terms of hardware area overhead and speed among the all-existing previous works. Also, the proposed architecture design can be used for various video applications from low bit-rate video to HDTV system.

Original languageEnglish
Title of host publication2008 International Conference on Communications, Circuits and Systems Proceedings, ICCCAS 2008
Pages679-683
Number of pages5
DOIs
StatePublished - 2008
Event2008 International Conference on Communications, Circuits and Systems, ICCCAS 2008 - Xiamen, Fujian Province, China
Duration: 25 May 200827 May 2008

Publication series

Name2008 International Conference on Communications, Circuits and Systems Proceedings, ICCCAS 2008

Conference

Conference2008 International Conference on Communications, Circuits and Systems, ICCCAS 2008
Country/TerritoryChina
CityXiamen, Fujian Province
Period25/05/0827/05/08

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