Hardware Trojans of Computing-In-Memories: Issues and Methods

Shih Hsu Huang; Wei Che Cheng; Jin Fu Li

doi:10.1109/DFT59622.2023.10313529

Hardware Trojans of Computing-In-Memories: Issues and Methods

Shih Hsu Huang, Wei Che Cheng, Jin Fu Li

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Ensuring the security of memory is crucial in current processor design, where memory is not only used for data storage but also for in-memory computation. In this paper, we explore the security design of embedded memory, focusing on possible hardware Trojans. We provide an overview of existing hardware Trojan designs in the memory mode, covering both SRAM (volatile memory) and STT-MARM (non-volatile memory). Then, we propose an innovative concept for a potential hardware Trojan design in the computing mode, specifically tailored for computing-in-memories. This paper aims to provide insights into the ways in which hardware Trojans exist and the measures we can take to mitigate their impact. These insights can pave the way for exploring detection and prevention methods to enhance memory design security.

Original language	English
Title of host publication	36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023
Editors	Luca Cassano, Mihalis Psarakis, Marcello Traiola, Alberto Bosio
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9798350315004
DOIs	https://doi.org/10.1109/DFT59622.2023.10313529
State	Published - 2023
Event	36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023 - Juan-Les-Pins, France Duration: 3 Oct 2023 → 5 Oct 2023

Publication series

Name	Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT
ISSN (Print)	2576-1501
ISSN (Electronic)	2765-933X

Conference

Conference	36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023
Country/Territory	France
City	Juan-Les-Pins
Period	3/10/23 → 5/10/23

Keywords

Trojan mitigation
embedded memory
hardware security
integrated circuits
supply chain

Access to Document

10.1109/DFT59622.2023.10313529

運算記憶體之測試與可靠性增強技術-總計畫暨子計畫一：運算記憶體之測試策略與自動化技術(3/3)
Li, J.-F. (PI)
1/08/25 → 31/07/26
Project: Research

Cite this

Huang, S. H., Cheng, W. C., & Li, J. F. (2023). Hardware Trojans of Computing-In-Memories: Issues and Methods. In L. Cassano, M. Psarakis, M. Traiola, & A. Bosio (Eds.), 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023 (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/DFT59622.2023.10313529

Huang, Shih Hsu ; Cheng, Wei Che ; Li, Jin Fu. / Hardware Trojans of Computing-In-Memories : Issues and Methods. 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023. editor / Luca Cassano ; Mihalis Psarakis ; Marcello Traiola ; Alberto Bosio. Institute of Electrical and Electronics Engineers Inc., 2023. (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT).

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abstract = "Ensuring the security of memory is crucial in current processor design, where memory is not only used for data storage but also for in-memory computation. In this paper, we explore the security design of embedded memory, focusing on possible hardware Trojans. We provide an overview of existing hardware Trojan designs in the memory mode, covering both SRAM (volatile memory) and STT-MARM (non-volatile memory). Then, we propose an innovative concept for a potential hardware Trojan design in the computing mode, specifically tailored for computing-in-memories. This paper aims to provide insights into the ways in which hardware Trojans exist and the measures we can take to mitigate their impact. These insights can pave the way for exploring detection and prevention methods to enhance memory design security.",

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Huang, SH, Cheng, WC & Li, JF 2023, Hardware Trojans of Computing-In-Memories: Issues and Methods. in L Cassano, M Psarakis, M Traiola & A Bosio (eds), 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023. Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT, Institute of Electrical and Electronics Engineers Inc., 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023, Juan-Les-Pins, France, 3/10/23. https://doi.org/10.1109/DFT59622.2023.10313529

Hardware Trojans of Computing-In-Memories: Issues and Methods. / Huang, Shih Hsu; Cheng, Wei Che; Li, Jin Fu.
36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023. ed. / Luca Cassano; Mihalis Psarakis; Marcello Traiola; Alberto Bosio. Institute of Electrical and Electronics Engineers Inc., 2023. (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Huang SH, Cheng WC, Li JF. Hardware Trojans of Computing-In-Memories: Issues and Methods. In Cassano L, Psarakis M, Traiola M, Bosio A, editors, 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2023. Institute of Electrical and Electronics Engineers Inc. 2023. (Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT). doi: 10.1109/DFT59622.2023.10313529

Hardware Trojans of Computing-In-Memories: Issues and Methods

Abstract

Publication series

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Keywords

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運算記憶體之測試與可靠性增強技術-總計畫暨子計畫一：運算記憶體之測試策略與自動化技術(3/3)

Cite this