Hardware implementation of EMD using DSP and FPGA for online signal processing

Ming Huan Lee, Kuo Kai Shyu, Po Lei Lee, Chien Ming Huang, Yun Jen Chiu

Research output: Contribution to journalArticlepeer-review

83 Scopus citations

Abstract

This paper combines a digital signal processor (DSP) and a field programmable gate array (FPGA) to realize the online empirical mode decomposition (EMD)-based signal processing system. The EMD algorithm is a novel signal analysis technique, decomposing signals into a series of intrinsic mode functions. First, the EMD algorithm is implemented in the DSP, named the EMD processor, which has the ability to eliminate noise from the original signal. Next, in order to process the online sequential signal, this paper proposes and implements pipeline and data transfer controllers in the FPGA, called the data processing flow processor. Then, the data processing flow processor coordinates the EMD processor, analog-to-digital converter, and digital-to-analog converter module boards. Finally, this paper presents a prototype of the online EMD-based electrocardiogram denoise system to verify the features of the proposed architecture. The emulations and experimental results demonstrate the effectiveness of the presented system as expected.

Original languageEnglish
Article number5518428
Pages (from-to)2473-2481
Number of pages9
JournalIEEE Transactions on Industrial Electronics
Volume58
Issue number6
DOIs
StatePublished - Jun 2011

Keywords

  • Digital signal processor (DSP)
  • empirical mode decomposition (EMD)
  • field programmable gate array (FPGA)

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