FSM-based transaction-level functional coverage for interface compliance verification

Man Yun Su, Che Hua Shih, Juinn Dar Huang, Jing Yang Jou

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Interface compliance verification plays a very important role in modern SoC designs. In order to perform a quantitative analysis of simulation completeness, adequate coverage metrics are mandatory. In this paper, we propose a finite state machine (FSM) based transaction-level functional coverage methodology for interface compliance verification. A language, State-Oriented Language (SOL), is developed to specify functional transactions mainly at the higher FSM level instead of lower logic or signal level. By utilizing SOL, it is simple and rigorous to specify interesting transactions from the specification FSM of the target interface protocol. Experimental results show that the proposed methodology can effectively improve the verification quality as well as increase the efficiency of regression verification.

Original languageEnglish
Title of host publicationProceedings of the ASP-DAC 2006
Subtitle of host publicationAsia and South Pacific Design Automation Conference 2006
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages448-453
Number of pages6
ISBN (Print)0780394518, 9780780394513
DOIs
StatePublished - 2006
EventASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006 - Yokohama, Japan
Duration: 24 Jan 200627 Jan 2006

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume2006

Conference

ConferenceASP-DAC 2006: Asia and South Pacific Design Automation Conference 2006
Country/TerritoryJapan
CityYokohama
Period24/01/0627/01/06

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