FinFET Plus: A scalable FinFET architecture with 3D air-gap and air-spacer toward the 3nm generation and beyond

C. K. Chiang; H. Pai; J. L. Lin; J. K. Chang; M. Y. Lee; E. R. Hsieh; K. S. Li; G. L. Luo; Osbert Cheng; S. S. Chung

doi:10.1109/VLSI-TSA51926.2021.9440097

FinFET Plus: A scalable FinFET architecture with 3D air-gap and air-spacer toward the 3nm generation and beyond

C. K. Chiang
, H. Pai
, J. L. Lin
, J. K. Chang
, M. Y. Lee
, E. R. Hsieh
, K. S. Li
, G. L. Luo
, Osbert Cheng
, S. S. Chung

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

17 Scopus citations

Abstract

A new improvement of FinFET has been demonstrated in the extension of the Moore's Law toward N3 technology and beyond. Instead of conventional STI, the approach is to use air-trench-isolation (ATI) between fins such that, in the width direction, inter-fin spaces with air-gap in the active region become scalable. The scalable ATI FinFET exhibits better DC and RF performance. Results show that the parasitic Cgd reduces 2.3x, and Ion enhances 6.5x; short-channel control is also much better than the conventional ones. Also, along channel direction, air-spacer between gate and S/D has been adopted to further reduce the parasitic capacitance. For a benchmark, in comparison to the conventional FinFET, the propagation delay with 55.8% reduction, active power reduction of 54%, and operating frequency range up to 1.43x gain can be achieved at N3 technology node.

Original language	English
Title of host publication	VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781665419345
DOIs	https://doi.org/10.1109/VLSI-TSA51926.2021.9440097
State	Published - 19 Apr 2021
Event	2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021 - Hsinchu, Taiwan Duration: 19 Apr 2021 → 22 Apr 2021

Publication series

Name	VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings

Conference

Conference	2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021
Country/Territory	Taiwan
City	Hsinchu
Period	19/04/21 → 22/04/21

Access to Document

10.1109/VLSI-TSA51926.2021.9440097

Cite this

Chiang, C. K., Pai, H., Lin, J. L., Chang, J. K., Lee, M. Y., Hsieh, E. R., Li, K. S., Luo, G. L., Cheng, O., & Chung, S. S. (2021). FinFET Plus: A scalable FinFET architecture with 3D air-gap and air-spacer toward the 3nm generation and beyond. In VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings Article 9440097 (VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA51926.2021.9440097

Chiang, C. K. ; Pai, H. ; Lin, J. L. et al. / FinFET Plus : A scalable FinFET architecture with 3D air-gap and air-spacer toward the 3nm generation and beyond. VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2021. (VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings).

@inproceedings{616dbf2e89094973ba40a7af9adb40fc,

title = "FinFET Plus: A scalable FinFET architecture with 3D air-gap and air-spacer toward the 3nm generation and beyond",

abstract = "A new improvement of FinFET has been demonstrated in the extension of the Moore's Law toward N3 technology and beyond. Instead of conventional STI, the approach is to use air-trench-isolation (ATI) between fins such that, in the width direction, inter-fin spaces with air-gap in the active region become scalable. The scalable ATI FinFET exhibits better DC and RF performance. Results show that the parasitic Cgd reduces 2.3x, and Ion enhances 6.5x; short-channel control is also much better than the conventional ones. Also, along channel direction, air-spacer between gate and S/D has been adopted to further reduce the parasitic capacitance. For a benchmark, in comparison to the conventional FinFET, the propagation delay with 55.8\% reduction, active power reduction of 54\%, and operating frequency range up to 1.43x gain can be achieved at N3 technology node.",

author = "Chiang, \{C. K.\} and H. Pai and Lin, \{J. L.\} and Chang, \{J. K.\} and Lee, \{M. Y.\} and Hsieh, \{E. R.\} and Li, \{K. S.\} and Luo, \{G. L.\} and Osbert Cheng and Chung, \{S. S.\}",

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Chiang, CK, Pai, H, Lin, JL, Chang, JK, Lee, MY, Hsieh, ER, Li, KS, Luo, GL, Cheng, O & Chung, SS 2021, FinFET Plus: A scalable FinFET architecture with 3D air-gap and air-spacer toward the 3nm generation and beyond. in VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings., 9440097, VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings, Institute of Electrical and Electronics Engineers Inc., 2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021, Hsinchu, Taiwan, 19/04/21. https://doi.org/10.1109/VLSI-TSA51926.2021.9440097

FinFET Plus: A scalable FinFET architecture with 3D air-gap and air-spacer toward the 3nm generation and beyond. / Chiang, C. K.; Pai, H.; Lin, J. L. et al.
VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2021. 9440097 (VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T2 - 2021 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2021

AU - Chiang, C. K.

AU - Pai, H.

AU - Lin, J. L.

AU - Chang, J. K.

AU - Lee, M. Y.

AU - Hsieh, E. R.

AU - Li, K. S.

AU - Luo, G. L.

AU - Cheng, Osbert

AU - Chung, S. S.

PY - 2021/4/19

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N2 - A new improvement of FinFET has been demonstrated in the extension of the Moore's Law toward N3 technology and beyond. Instead of conventional STI, the approach is to use air-trench-isolation (ATI) between fins such that, in the width direction, inter-fin spaces with air-gap in the active region become scalable. The scalable ATI FinFET exhibits better DC and RF performance. Results show that the parasitic Cgd reduces 2.3x, and Ion enhances 6.5x; short-channel control is also much better than the conventional ones. Also, along channel direction, air-spacer between gate and S/D has been adopted to further reduce the parasitic capacitance. For a benchmark, in comparison to the conventional FinFET, the propagation delay with 55.8% reduction, active power reduction of 54%, and operating frequency range up to 1.43x gain can be achieved at N3 technology node.

AB - A new improvement of FinFET has been demonstrated in the extension of the Moore's Law toward N3 technology and beyond. Instead of conventional STI, the approach is to use air-trench-isolation (ATI) between fins such that, in the width direction, inter-fin spaces with air-gap in the active region become scalable. The scalable ATI FinFET exhibits better DC and RF performance. Results show that the parasitic Cgd reduces 2.3x, and Ion enhances 6.5x; short-channel control is also much better than the conventional ones. Also, along channel direction, air-spacer between gate and S/D has been adopted to further reduce the parasitic capacitance. For a benchmark, in comparison to the conventional FinFET, the propagation delay with 55.8% reduction, active power reduction of 54%, and operating frequency range up to 1.43x gain can be achieved at N3 technology node.

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DO - 10.1109/VLSI-TSA51926.2021.9440097

M3 - 會議論文篇章

AN - SCOPUS:85108145557

T3 - VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings

BT - VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 19 April 2021 through 22 April 2021

ER -

Chiang CK, Pai H, Lin JL, Chang JK, Lee MY, Hsieh ER et al. FinFET Plus: A scalable FinFET architecture with 3D air-gap and air-spacer toward the 3nm generation and beyond. In VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings. Institute of Electrical and Electronics Engineers Inc. 2021. 9440097. (VLSI-TSA 2021 - 2021 International Symposium on VLSI Technology, Systems and Applications, Proceedings). doi: 10.1109/VLSI-TSA51926.2021.9440097

FinFET Plus: A scalable FinFET architecture with 3D air-gap and air-spacer toward the 3nm generation and beyond

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