Fault Modeling and Testing of RRAM-based Computing-In Memories

Yu Cheng Yang; Jin Fu Li

doi:10.1109/ITCAsia55616.2022.00012

Fault Modeling and Testing of RRAM-based Computing-In Memories

Yu Cheng Yang, Jin Fu Li

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

Resistive random access memory (RRAM) is one promising nonvolatile memory. It also is a good candidate for realizing computing-in memories. In this paper, we perform fault modeling for 1T1R RRAM-based computing-in memories (CIMs). Although there are existing works reported fault modeling and testing for RRAMs and RRAM-based CIMs, they do the fault analysis based on bit-oriented array organization. Here we inject intra-cell and inter-cell electrical defects in a word-oriented cell array for the fault analysis. Fault analysis results show that a RRAM-based CIM may have computing faults and data dependent faults in addition to conventional RRAM faults. We also propose a march test March-R11N for the 1T1R RRAM-based CIMs. Analysis results show that March-R11N requires 11N test complexity to cover all the typical faults and defined faults of a 1T1R RRAM-based CIM with N words.

Original language	English
Title of host publication	Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	7-12
Number of pages	6
ISBN (Electronic)	9781665455237
DOIs	https://doi.org/10.1109/ITCAsia55616.2022.00012
State	Published - 2022
Event	6th IEEE International Test Conference in Asia, ITC-Asia 2022 - Taipei, Taiwan Duration: 24 Aug 2022 → 26 Aug 2022

Publication series

Name	Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022

Conference

Conference	6th IEEE International Test Conference in Asia, ITC-Asia 2022
Country/Territory	Taiwan
City	Taipei
Period	24/08/22 → 26/08/22

Keywords

Resistive RAM
computing faults
computing-in memory
march test

Access to Document

10.1109/ITCAsia55616.2022.00012

應用於運算記憶體之前瞻可靠度及測試框架-總計畫暨子計畫一：應用於運算記憶體之測試技術
Li, J.-F. (PI)
1/08/22 → 31/07/23
Project: Research

Cite this

Yang, Y. C., & Li, J. F. (2022). Fault Modeling and Testing of RRAM-based Computing-In Memories. In Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022 (pp. 7-12). (Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ITCAsia55616.2022.00012

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abstract = "Resistive random access memory (RRAM) is one promising nonvolatile memory. It also is a good candidate for realizing computing-in memories. In this paper, we perform fault modeling for 1T1R RRAM-based computing-in memories (CIMs). Although there are existing works reported fault modeling and testing for RRAMs and RRAM-based CIMs, they do the fault analysis based on bit-oriented array organization. Here we inject intra-cell and inter-cell electrical defects in a word-oriented cell array for the fault analysis. Fault analysis results show that a RRAM-based CIM may have computing faults and data dependent faults in addition to conventional RRAM faults. We also propose a march test March-R11N for the 1T1R RRAM-based CIMs. Analysis results show that March-R11N requires 11N test complexity to cover all the typical faults and defined faults of a 1T1R RRAM-based CIM with N words.",

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Yang, YC & Li, JF 2022, Fault Modeling and Testing of RRAM-based Computing-In Memories. in Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022. Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022, Institute of Electrical and Electronics Engineers Inc., pp. 7-12, 6th IEEE International Test Conference in Asia, ITC-Asia 2022, Taipei, Taiwan, 24/08/22. https://doi.org/10.1109/ITCAsia55616.2022.00012

Fault Modeling and Testing of RRAM-based Computing-In Memories. / Yang, Yu Cheng; Li, Jin Fu.
Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 7-12 (Proceedings - 2022 IEEE International Test Conference in Asia, ITC-Asia 2022).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Li, Jin Fu

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N2 - Resistive random access memory (RRAM) is one promising nonvolatile memory. It also is a good candidate for realizing computing-in memories. In this paper, we perform fault modeling for 1T1R RRAM-based computing-in memories (CIMs). Although there are existing works reported fault modeling and testing for RRAMs and RRAM-based CIMs, they do the fault analysis based on bit-oriented array organization. Here we inject intra-cell and inter-cell electrical defects in a word-oriented cell array for the fault analysis. Fault analysis results show that a RRAM-based CIM may have computing faults and data dependent faults in addition to conventional RRAM faults. We also propose a march test March-R11N for the 1T1R RRAM-based CIMs. Analysis results show that March-R11N requires 11N test complexity to cover all the typical faults and defined faults of a 1T1R RRAM-based CIM with N words.

AB - Resistive random access memory (RRAM) is one promising nonvolatile memory. It also is a good candidate for realizing computing-in memories. In this paper, we perform fault modeling for 1T1R RRAM-based computing-in memories (CIMs). Although there are existing works reported fault modeling and testing for RRAMs and RRAM-based CIMs, they do the fault analysis based on bit-oriented array organization. Here we inject intra-cell and inter-cell electrical defects in a word-oriented cell array for the fault analysis. Fault analysis results show that a RRAM-based CIM may have computing faults and data dependent faults in addition to conventional RRAM faults. We also propose a march test March-R11N for the 1T1R RRAM-based CIMs. Analysis results show that March-R11N requires 11N test complexity to cover all the typical faults and defined faults of a 1T1R RRAM-based CIM with N words.

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Fault Modeling and Testing of RRAM-based Computing-In Memories

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應用於運算記憶體之前瞻可靠度及測試框架-總計畫暨子計畫一：應用於運算記憶體之測試技術

Cite this