@inproceedings{ce0d1fe9583d4e918b65a5dc82f1a56a,
title = "Fault modeling and testing of resistive nonvolatile-8T SRAMs",
abstract = "In modern system-on-chips (SOCs), static power consumption represents a significant portion of the chip power. Since static random access memory (SRAM) typically occupies more than one half of the chip area, static power of a SOC is mainly constituted by the SRAMs. Resistive nonvolatile-8T (Rnv8T) SRAM has been proposed to alleviate static power and preserve data in power-down mode and provide fast poweron speed. A Rnv8T SRAM cell is composed of a 6T SRAM cell, two resistive devices, and two transistors. In this paper, we define several memristor-related faults for the Rnv8T SRAM considering electrical defects. Also, a March-like test algorithm which can cover simple SRAM faults and defined memristor-related faults are proposed. In comparison with the existing work, the proposed March-like test needs longer test time, but provides better fault coverage on the targeted faults.",
keywords = "fault model, March test, Memristor, nonvolatile SRAM, test algorithm",
author = "Li, {Yu Ting} and Chen, {Yong Xiao} and Li, {Jin Fu}",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 34th IEEE VLSI Test Symposium, VTS 2016 ; Conference date: 25-04-2016 Through 27-04-2016",
year = "2016",
month = may,
day = "23",
doi = "10.1109/VTS.2016.7477303",
language = "???core.languages.en_GB???",
series = "Proceedings of the IEEE VLSI Test Symposium",
publisher = "IEEE Computer Society",
booktitle = "Proceedings - 2016 IEEE 34th VLSI Test Symposium, VTS 2016",
}