Abstract
This paper presents a novel scheme to diagnose single and double faults for linear analog circuits. The scheme first proposes a simple transformation procedure to transform the tested linear analog circuit into a discrete signal flow graph, then constructs `diagnosing evaluators', which model the faulty components, to form a diagnosis configuration to diagnose the faults through digital simulation. This saves much computation time. Furthermore, a simple method to un-power the OP's is also proposed to differentiate equivalent faults. The scheme can diagnose faults in passive components as well as faults in OP's.
Original language | English |
---|---|
Pages (from-to) | 25-30 |
Number of pages | 6 |
Journal | Proceedings of the Asian Test Symposium |
State | Published - 2000 |
Event | 9th Asian Test Symposium - Taipei, Taiwan Duration: 4 Dec 2000 → 6 Dec 2000 |