Efficient built-In self-test for video coding cores: A case study on motion estimation computing array

Yu Sheng Huang, Kai Chen, Chun Lung Hsu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Motion estimation algorithms are used in various video coding systems. With the advent of VLSI technology, a large collection of processing elements can be assembled to achieve high-speed computation economically. Rather, the problem of testing a VLSI chip begins with introduction of a defect during the design or implementation phases. Therefore, this paper describes a novel testing scheme of motion estimation. The key part of this scheme is to offer high reliability for motion estimation architecture. The experimental result shows the design achieve 100% fault coverage. And, the main advantages of this scheme are minimal performance degradation, small cost of hardware overhead and the benefit of at-speed testing.

Original languageEnglish
Title of host publicationProceedings of APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
Pages1751-1754
Number of pages4
DOIs
StatePublished - 2008
EventAPCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems - Macao, China
Duration: 30 Nov 20083 Dec 2008

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Conference

ConferenceAPCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
Country/TerritoryChina
CityMacao
Period30/11/083/12/08

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