Diagnosis algorithms for locating bridge defects in multi-port RAMs

Tsu Wei Tseng, Jin Fu Li

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Multi-port random access memory (MPRAM) is widely used in system-on-chip (SOC) designs. This paper presents two defect-location algorithms (DLAs) for locating the bridge defects between word-lines and bit-lines in a MPRAM. Once faulty rows or faulty columns are detected by a typical test for functional faults, the DLAs can be used to locate bridge defects between bit-lines or word-lines if such bridge defects exist. For a k-port MPRAM, the proposed word-line DLA and bit-line DLA requires (4k+9)m and 10n test operations to locate bit-line and word-line bridge defects if the MPRAM with m detected faulty rows and n detected faulty columns.

Original languageEnglish
Title of host publication2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09
DOIs
StatePublished - 2009
Event2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09 - Chengdu, China
Duration: 28 Apr 200929 Apr 2009

Publication series

Name2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09

Conference

Conference2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD'09
Country/TerritoryChina
CityChengdu
Period28/04/0929/04/09

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